Displaying 3 results from an estimated 3 matches for "pcie_get_speed_cap".
2019 Nov 20
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
..._info(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
> msleep(1000 + delay);
> return;
> }
> @@ -4741,10 +4736,10 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
> return;
>
> if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
> - pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
> + pci_info(dev, "waiting %d ms for downstream link\n", delay);
> msleep(delay);
> } else {
> - pci_db...
2019 Nov 20
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...- pci_dbg(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
+ pci_info(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
msleep(1000 + delay);
return;
}
@@ -4741,10 +4736,10 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
return;
if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
- pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
+ pci_info(dev, "waiting %d ms for downstream link\n", delay);
msleep(delay);
} else {
- pci_dbg(dev, "waiting %d ms for downstream link, after activation\n",
+ pci_in...
2019 Nov 20
4
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
On Wed, Nov 20, 2019 at 04:37:14PM +0100, Karol Herbst wrote:
> On Wed, Nov 20, 2019 at 4:15 PM Mika Westerberg
> <mika.westerberg at intel.com> wrote:
> >
> > On Wed, Nov 20, 2019 at 01:11:52PM +0100, Karol Herbst wrote:
> > > On Wed, Nov 20, 2019 at 1:09 PM Mika Westerberg
> > > <mika.westerberg at intel.com> wrote:
> > > >
> >