search for: pcie

In libvirt, I found pcie-expander-bus controller doesn't support pcie-to-pci-bridge and pcie-switch-upstream-port. Version: libvirt-4.9 # cat /tmp/c.xml ... <controller type='pci' index='0' model='pcie-root'/> <controller type='pci' index='1' model='pcie-ex...

On 10/17/2018 08:56 AM, Andrea Bolognani wrote: > On Wed, 2018-10-17 at 10:50 +0800, Han Han wrote: >> In libvirt, I found pcie-expander-bus controller doesn't support pcie-to-pci-bridge and pcie-switch-upstream-port. > [...] >> # virsh -k0 -K0 define /tmp/c.xml > Aside: the -k and -K virsh options are documented as > > -k | --keepalive-interval=NUM > keepalive interval in se...

On Wed, 2018-10-17 at 10:50 +0800, Han Han wrote: > In libvirt, I found pcie-expander-bus controller doesn't support pcie-to-pci-bridge and pcie-switch-upstream-port. [...] > # virsh -k0 -K0 define /tmp/c.xml Aside: the -k and -K virsh options are documented as -k | --keepalive-interval=NUM keepalive interval in seconds, 0 for disable -K |...

...4.c | 9 +++++++++ > drm/nouveau/nvkm/subdev/pci/g92.c | 1 + > drm/nouveau/nvkm/subdev/pci/g94.c | 1 + > drm/nouveau/nvkm/subdev/pci/gf100.c | 1 + > drm/nouveau/nvkm/subdev/pci/gf106.c | 1 + > drm/nouveau/nvkm/subdev/pci/gk104.c | 1 + > drm/nouveau/nvkm/subdev/pci/pcie.c | 14 ++++++++++++++ > drm/nouveau/nvkm/subdev/pci/priv.h | 2 ++ > 8 files changed, 30 insertions(+) > > diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c b/drm/nouveau/nvkm/subdev/pci/g84.c > index 62438d892..353d70d7e 100644 > --- a/drm/nouveau/nvkm/subdev/pci/g84.c > +++...

everything was taken from nvgpu. Main reason for adding is to improve stability of the PCIe link changing code as we might want to depend on it for a workaround fixing our infamous runpm issues on recent laptops Karol Herbst (3): pci: force disable ASPM before changing the link speed pci/gk104: enable dl_mgr safe mode pci/gk104: wait for ltssm idle before changing the link drm/no...

On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote: > Apperantly things go south if we suspend the device with a different PCIE > link speed set than it got booted with. Fixes runtime suspend on my gp107. > > This all looks like some bug inside the pci subsystem and I would prefer a > fix there instead of nouveau, but maybe there is no real nice way of doing > that outside of drivers? I agree it would be ni...

Dear Daniel, The thirty-party PCIe card is based on the Xilinx’ FPGA which is off the shelf, the main features are as follows: 1) x8 Gen3, 8Gb/s per lane/direction 2) MSI and legacy interrupt support 3) Scatter-gather packet DMA engine provide by Northwest Logic We hope multiple Linux Containers to access the PCIe card in time divis...

Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drm/nouveau/include/nvkm/subdev/pci.h | 5 +++-- drm/nouveau/nvkm/subdev/pci/base.c | 7 +++++-- drm/nouveau/nvkm/subdev/pci/pcie.c | 15 +++++++++++---- drm/nouveau/nvkm/subdev/pci/priv.h | 1 + 4 files changed, 20 insertions(+), 8 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/pci.h b/drm/nouveau/include/nvkm/subdev/pci.h index 1fdf3098..b23793a2 100644 --- a/drm/nouveau/include/nvkm/subdev/pci.h +++ b/dr...

Apperantly things go south if we suspend the device with a different PCIE link speed set than it got booted with. Fixes runtime suspend on my gp107. This all looks like some bug inside the pci subsystem and I would prefer a fix there instead of nouveau, but maybe there is no real nice way of doing that outside of drivers? v2: squashed together patch 4 and 5 Signed-off...

...drm/nouveau/nvkm/subdev/pci/g84.c | 9 +++++++++ drm/nouveau/nvkm/subdev/pci/g92.c | 1 + drm/nouveau/nvkm/subdev/pci/g94.c | 1 + drm/nouveau/nvkm/subdev/pci/gf100.c | 1 + drm/nouveau/nvkm/subdev/pci/gf106.c | 1 + drm/nouveau/nvkm/subdev/pci/gk104.c | 1 + drm/nouveau/nvkm/subdev/pci/pcie.c | 14 ++++++++++++++ drm/nouveau/nvkm/subdev/pci/priv.h | 2 ++ 8 files changed, 30 insertions(+) diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c b/drm/nouveau/nvkm/subdev/pci/g84.c index 62438d892..353d70d7e 100644 --- a/drm/nouveau/nvkm/subdev/pci/g84.c +++ b/drm/nouveau/nvkm/subdev/pci/g84....

...nning it on vbios provided signed PMU image, but on the devinit parser we have inside Nouveau. Allthough this one isn't as feature complete as the vbios one, I was able to reproduce the runpm issues as well. From that point I was able to only run a certain amount of commands until I got to some PCIe initialization code inside devinit which trigger those runpm issues. Devinit on my GPU was changing the PCIe link from 8.0 to 2.5, reversing that on the fini path makes runpm work again. There are a few other things going on, but with my limited knowledge about PCIe in general, the change in the...

...4 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c index e68030507..664890185 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -23,7 +23,7 @@ */ #include "priv.h" -static int +int gk104_pcie_version_supported(struct nvkm_pci *pci) { return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; @@ -108,7 +108,7 @@ gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) return -1; } -static enum nvkm_pcie_speed +enum nvkm_pcie_speed gk104_pcie_max_speed(struct nvkm_pci *pci...

...e last time I sent those patches out, but there are a couple of annoying bug fixes, which users would probably never hit unless they do rmmod/modprobe nouveau cycles. Biggest change is that I force the link to a 8.0 speed rather than the speed the GPU came up with. Also this series depends on the PCIe improvement patches I sent out recently. Karol Herbst (4): pci: enable pcie link changes for pascal pci: add nvkm_pcie_get_speed pci: set the pcie link speed to 8.0 when suspending drm: abort runtime suspend if we hit an error drm/nouveau/include/nvkm/core/device.h | 2 ++ drm/nouveau/i...

overall the same as the old stuff, but with better namings and tirivialy improved code here and there Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf: parse the pci speed from the bios for tesla and newer cards perf: add fields for pci speed and width and use it for the pstates perf:...

...common issue on arm is that the pci memory window is too narrow to allocate all the BARs. Can you see if there are messages in the kernel to that effect? All the BAR allocations seem to succeed except for the IO one. AIUI I/O is deprecated, but is it still used on these cards? [ 1.060851] brcm-pcie fd500000.pcie: host bridge /scb/pcie at 7d500000 ranges: [ 1.060892] brcm-pcie fd500000.pcie: No bus range found for /scb/pcie at 7d500000, using [bus 00-ff] [ 1.060975] brcm-pcie fd500000.pcie: MEM 0x0600000000..0x063fffffff -> 0x00c0000000 [ 1.061061] brcm-pcie fd500000.pcie:...

On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas <helgaas at kernel.org> wrote: > > On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote: > > Apperantly things go south if we suspend the device with a different PCIE > > link speed set than it got booted with. Fixes runtime suspend on my gp107. > > > > This all looks like some bug inside the pci subsystem and I would prefer a > > fix there instead of nouveau, but maybe there is no real nice way of doing > > that outside of drivers?...

...nning it on vbios provided signed PMU image, but on the devinit parser we have inside Nouveau. Allthough this one isn't as feature complete as the vbios one, I was able to reproduce the runpm issues as well. From that point I was able to only run a certain amount of commands until I got to some PCIe initialization code inside devinit which trigger those runpm issues. Devinit on my GPU was changing the PCIe link from 8.0 to 2.5, reversing that on the fini path makes runpm work again. There are a few other things going on, but with my limited knowledge about PCIe in general, the change in the...

I merged the both series I sent out recently into one bigger one so that it's more obvious on why all of that is needed. Biggest changes since last sent: * reworked the ASPM patch * removed "pci: add nvkm_pcie_get_speed" patch Please test this on Laptops and report back if it either breaks something or doesn't fix runpm. Thanks Karol Herbst (6): pci: disable ASPM before changing the link speed pci/gk104: enable dl_mgr safe mode pci/gk104: wait for ltssm idle before changing the link p...

...May 21, 2019 at 12:30:38AM +0200, Karol Herbst wrote: > On Mon, May 20, 2019 at 11:20 PM Bjorn Helgaas <helgaas at kernel.org> wrote: > > On Tue, May 07, 2019 at 10:12:45PM +0200, Karol Herbst wrote: > > > Apperantly things go south if we suspend the device with a different PCIE > > > link speed set than it got booted with. Fixes runtime suspend on my gp107. > > > > > > This all looks like some bug inside the pci subsystem and I would prefer a > > > fix there instead of nouveau, but maybe there is no real nice way of doing > > >...

...for the IO one. > > AIUI I/O is deprecated, but is it still used on these cards? > > I must admit I was ignorant of the fact that the IO ports were treated > as a BAR, but it makes a lot of sense. > > One thing does stand out as odd: > > > > > [ 1.060851] brcm-pcie fd500000.pcie: host bridge /scb/pcie at 7d500000 ranges: > > [ 1.060892] brcm-pcie fd500000.pcie: No bus range found for > > /scb/pcie at 7d500000, using [bus 00-ff] > > [ 1.060975] brcm-pcie fd500000.pcie: MEM > > 0x0600000000..0x063fffffff -> 0x00c0000000 &...