search for: pci_scan_child_bus_extend

...e.c @@ -17,6 +17,7 @@ #include <linux/acpi.h> #include <linux/irqdomain.h> #include <linux/pm_runtime.h> +#include <linux/hypervisor.h> #include "pci.h" #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ @@ -2454,6 +2455,7 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, unsigned int available_buses) { unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0; + unsigned int stride = jailhouse_paravirt() ? 1 : 8; unsigned int start = bus->busn_res.start; unsigned int devfn, cmax, max = start; struct pci_dev *dev;...

...obe.c @@ -16,6 +16,7 @@ #include <linux/pci-aspm.h> #include <linux/aer.h> #include <linux/acpi.h> +#include <linux/hypervisor.h> #include <linux/irqdomain.h> #include <linux/pm_runtime.h> #include "pci.h" @@ -2517,6 +2518,7 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, unsigned int available_buses) { unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0; + unsigned int stride = jailhouse_paravirt() ? 1 : 8; unsigned int start = bus->busn_res.start; unsigned int devfn, cmax, max = start; struct pci_dev *dev;...

On Wed, 28 Feb 2018, Jan Kiszka wrote: > From: Jan Kiszka <jan.kiszka at siemens.com> > > Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to > have a function 0. Therefore, Linux scans for devices at function 0 > (devfn 0/8/16/...) and only scans for other functions if function 0 > has its Multi-Function Device bit set or ARI or SR-IOV indicate >

...e.c @@ -16,6 +16,7 @@ #include <linux/pci-aspm.h> #include <linux/aer.h> #include <linux/acpi.h> +#include <linux/hypervisor.h> #include <linux/irqdomain.h> #include <linux/pm_runtime.h> #include "pci.h" @@ -2518,14 +2519,29 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, { unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0; unsigned int start = bus->busn_res.start; - unsigned int devfn, cmax, max = start; + unsigned int devfn, fn, cmax, max = start; struct pci_dev *dev; + int nr_devs; dev_dbg(&bus->dev, "...

...e.c @@ -16,6 +16,7 @@ #include <linux/pci-aspm.h> #include <linux/aer.h> #include <linux/acpi.h> +#include <linux/hypervisor.h> #include <linux/irqdomain.h> #include <linux/pm_runtime.h> #include "pci.h" @@ -2518,14 +2519,29 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, { unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0; unsigned int start = bus->busn_res.start; - unsigned int devfn, cmax, max = start; + unsigned int devfn, fn, cmax, max = start; struct pci_dev *dev; + int nr_devs; dev_dbg(&bus->dev, "...

...e.c @@ -16,6 +16,7 @@ #include <linux/pci-aspm.h> #include <linux/aer.h> #include <linux/acpi.h> +#include <linux/hypervisor.h> #include <linux/irqdomain.h> #include <linux/pm_runtime.h> #include "pci.h" @@ -2518,14 +2519,29 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, { unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0; unsigned int start = bus->busn_res.start; - unsigned int devfn, cmax, max = start; + unsigned int devfn, fn, cmax, max = start; struct pci_dev *dev; + int nr_devs; dev_dbg(&bus->dev, "...

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -