search for: pci_platform_pm

...++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 088fcdc8d2b4..9dbd29ced1ac 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -799,6 +799,42 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; } +/* + * some intel bridges cause serious issues with runpm if the client device + * is put into D1/D2/D3hot before putting the client into D3cold via + * platform means (generally ACPI). + * + * skipping this makes runpm work perfectly fine on such...

...++ include/linux/pci.h | 1 + 3 files changed, 64 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b97d9e10c9cc..8e056eb7e6ff 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -805,6 +805,13 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; } +static inline bool parent_broken_child_pm(struct pci_dev *dev) +{ + if (!dev->bus || !dev->bus->self) + return false; + return dev->bus->self->broken_nv_runpm && dev->broken_nv_runpm; +} + /** * pci_raw_set_power_s...

...gt; > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > > index b97d9e10c9cc..8e056eb7e6ff 100644 > > --- a/drivers/pci/pci.c > > +++ b/drivers/pci/pci.c > > @@ -805,6 +805,13 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) > > return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; > > } > > > > +static inline bool parent_broken_child_pm(struct pci_dev *dev) > > +{ > > + if (!dev->bus || !dev->bus->self) > > + return false; > > + return dev->bus->self-&g...

...file changed, 39 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index 088fcdc8d2b4..9dbd29ced1ac 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -799,6 +799,42 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) > return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; > } > > +/* > + * some intel bridges cause serious issues with runpm if the client device > + * is put into D1/D2/D3hot before putting the client into D3cold via > + * platform means (generally ACPI). You mention Nvidia GPUs above,...

...files changed, 64 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index b97d9e10c9cc..8e056eb7e6ff 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -805,6 +805,13 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) > return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; > } > > +static inline bool parent_broken_child_pm(struct pci_dev *dev) > +{ > + if (!dev->bus || !dev->bus->self) > + return false; > + return dev->bus->self->broken_nv_runpm && dev->broken_nv_runpm...

...++ include/linux/pci.h | 1 + 3 files changed, 62 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 088fcdc8d2b4..65516b024ee5 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -799,6 +799,13 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; } +static inline bool parent_broken_child_pm(struct pci_dev *dev) +{ + if (!dev->bus || !dev->bus->self) + return false; + return dev->bus->self->broken_child_pm; +} + /** * pci_raw_set_power_state - Use PCI PM registers to set...

...a/drivers/pci/pci.c b/drivers/pci/pci.c > > > index b97d9e10c9cc..8e056eb7e6ff 100644 > > > --- a/drivers/pci/pci.c > > > +++ b/drivers/pci/pci.c > > > @@ -805,6 +805,13 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) > > > return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; > > > } > > > > > > +static inline bool parent_broken_child_pm(struct pci_dev *dev) > > > +{ > > > + if (!dev->bus || !dev->bus->self) > > > + return false; > > > +...

...gt; > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > > index 088fcdc8d2b4..9dbd29ced1ac 100644 > > --- a/drivers/pci/pci.c > > +++ b/drivers/pci/pci.c > > @@ -799,6 +799,42 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) > > return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; > > } > > > > +/* > > + * some intel bridges cause serious issues with runpm if the client device > > + * is put into D1/D2/D3hot before putting the client into D3cold via > > + * platform means (generally ACPI). &gt...

In the autumn and winter it's considered bad form to set power state to D3cold, it might cause the device to freeze to death. This is also the case in the other seasons, so any device in the southern hemisphere is affected too. D3cold is not a valid state in a call to pci_set_power_state, only up to D3hot is allowed. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>

...vers/pci/pci.c > > > > index b97d9e10c9cc..8e056eb7e6ff 100644 > > > > --- a/drivers/pci/pci.c > > > > +++ b/drivers/pci/pci.c > > > > @@ -805,6 +805,13 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) > > > > return pci_platform_pm ? pci_platform_pm->bridge_d3(dev) : false; > > > > } > > > > > > > > +static inline bool parent_broken_child_pm(struct pci_dev *dev) > > > > +{ > > > > + if (!dev->bus || !dev->bus->self) > > > > +...

...es = 1; - break; - default: - /* Should never get here, but just in case... */ - return; - } + int i; - for (i = 0; i < numres; i ++) - pci_update_resource(dev, &dev->resource[i], i); + for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0...

...es = 1; - break; - default: - /* Should never get here, but just in case... */ - return; - } + int i; - for (i = 0; i < numres; i ++) - pci_update_resource(dev, &dev->resource[i], i); + for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0...

...es = 1; - break; - default: - /* Should never get here, but just in case... */ - return; - } + int i; - for (i = 0; i < numres; i ++) - pci_update_resource(dev, &dev->resource[i], i); + for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0...

...just in case... */ - return; - } + int i; - for (i = 0; i < numres; i ++) - pci_update_resource(dev, &dev->resource[i], i); + for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success,...

...just in case... */ - return; - } + int i; - for (i = 0; i < numres; i ++) - pci_update_resource(dev, &dev->resource[i], i); + for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success,...

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew