search for: pci_msix_writel

...: intx=1 pt_msi_disable: Unmap msi with pirq 4f pt_msix_update_one: Update msix entry 0 with pirq 4f gvec 59 pt_msixctrl_reg_write: guest enabling MSI-X, disable MSI-INTx translation pci_intx: intx=1 pt_msi_disable: Unmap msi with pirq 4e pt_msix_update_one: Update msix entry 0 with pirq 4e gvec 69 pci_msix_writel: Can''t update entry 0 since MSI-X is already enabled (fee00000 -> fee02000) pci_msix_writel: Can''t update entry 0 since MSI-X is already enabled (00004059 -> 00004071) Can''t reproduce with uek2(3.1 stable), but if I disable hvm_pirqs support in uek2, reproduce t...

...uint32_t val) { - PT_LOG("Error: Invalid write to MSI-X table, \ - only dword access is allowed.\n"); + PT_LOG("Error: Invalid write to MSI-X table, addr %016"PRIx64";" + " only dword access is allowed\n", addr); } static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -441,13 +441,11 @@ static void pci_msix_writel(void *opaque struct pt_msix_info *msix = dev->msix; struct msix_entry_info *entry; int entry_nr, offset; - void *phys_off; - uint32_t vec_ctrl; if ( addr % 4 )...

...rst_map=0 pt_ioport_map: e_phys=ffff pio_base=d000 len=256 index=0 first_map=0 pt_ioport_map: e_phys=c200 pio_base=d000 len=256 index=0 first_map=0 pt_msixctrl_reg_write: guest enabling MSI-X, disable MSI-INTx translation pci_intx: intx=1 pt_msix_update_one: Update msix entry 0 with pirq 4d gvec 59 pci_msix_writel: Error: Can''t update msix entry 0 since MSI-X is already function. pci_msix_writel: Error: Can''t update msix entry 0 since MSI-X is already function. pci_msix_writel: Error: Can''t update msix entry 0 since MSI-X is already func...

...ugzilla.xensource.com/bugzilla/show_bug.cgi?id=1590 Old Open Bugs (4) ============================================================================ 1. [RAS] CPUs are not in the correct NUMA node after hot-add memory http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1573 2. [SR-IOV] Qemu report pci_msix_writel error while assigning VF to guest http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1575 3. [RAS] Incorrect behavior after execute first cpu_set command http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1583 4. [ACPI] Gulftown-HEDT can not resume from Dom0 S3 http://bugzilla.xensource.com...

ioemu-remote: Enable pci pass-through by default. -- Jean Guyader _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...com/bugzilla/show_bug.cgi?id=1541 8. Linux guest boots up very slow with SDL rendering http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1478 9. [RAS] CPUs are not in the correct NUMA node after hot-add memory http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1573 10. [SR-IOV] Qemu report pci_msix_writel error while assigning VF to guest http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1575 11. Add fix for TBOOT/Xen and S3 flow http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1611 12. Dom0 may fail to resume from S3 http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1634 13. guest a...