Displaying 20 results from an estimated 37 matches for "pci_info".
2019 Nov 20
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
> * management for them (see pci_bridge_d3_possible()).
> */
> if (!pci_is_pcie(dev)) {
> - pci_dbg(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
> + pci_info(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
> msleep(1000 + delay);
> return;
> }
> @@ -4741,10 +4736,10 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
> return;
>
> if (pcie_...
2019 Nov 20
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...->devices, struct pci_dev,
bus_list);
@@ -4715,7 +4710,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
* management for them (see pci_bridge_d3_possible()).
*/
if (!pci_is_pcie(dev)) {
- pci_dbg(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
+ pci_info(dev, "waiting %d ms for secondary bus\n", 1000 + delay);
msleep(1000 + delay);
return;
}
@@ -4741,10 +4736,10 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
return;
if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
- pci_dbg(dev, "waiting %d ms for...
2019 Nov 20
4
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
On Wed, Nov 20, 2019 at 04:37:14PM +0100, Karol Herbst wrote:
> On Wed, Nov 20, 2019 at 4:15 PM Mika Westerberg
> <mika.westerberg at intel.com> wrote:
> >
> > On Wed, Nov 20, 2019 at 01:11:52PM +0100, Karol Herbst wrote:
> > > On Wed, Nov 20, 2019 at 1:09 PM Mika Westerberg
> > > <mika.westerberg at intel.com> wrote:
> > > >
> >
2019 Aug 01
3
[PATCH] PCI: Use pci_reset_bus() in quirk_reset_lenovo_thinkpad_50_nvgpu()
...)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 208aacf39329..44c4ae1abd00 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5256,7 +5256,7 @@ static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev)
*/
if (ioread32(map + 0x2240c) & 0x2) {
pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
- ret = pci_reset_function(pdev);
+ ret = pci_reset_bus(pdev);
if (ret < 0)
pci_err(pdev, "Failed to reset GPU: %d\n", ret);
}
--
2.21.0
2023 Mar 16
2
[PATCH] PCI: stop spamming info in quirk_nvidia_hda
...ed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 44cab813bf951..b10c77bbe4716 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5549,7 +5549,7 @@ static void quirk_nvidia_hda(struct pci_dev *gpu)
if (val & BIT(25))
return;
- pci_info(gpu, "Enabling HDA controller\n");
+ pci_dbg(gpu, "Enabling HDA controller\n");
pci_write_config_dword(gpu, 0x488, val | BIT(25));
/* The GPU becomes a multi-function device when the HDA is enabled */
--
2.39.2
2020 Sep 24
2
[PATCH v3 5/6] iommu/virtio: Support topology description in config space
...eed
> + * to access the BARs ourselves.
> + */
> + ret = viommu_pci_find_capability(dev, VIRTIO_PCI_CAP_COMMON_CFG, &cap);
> + if (!ret) {
> + pci_warn(dev, "common capability not found\n");
Is the lack of this capability really an error, i.e., is this
pci_warn() or pci_info()? The "device doesn't have topology
description" below is only pci_dbg(), which suggests that we can live
without this.
Maybe a hint about what "common capability" means?
> + return;
> + }
> +
> + if (pci_enable_device_mem(dev))
> + return;
> +
> +...
2020 Sep 24
2
[PATCH v3 5/6] iommu/virtio: Support topology description in config space
...eed
> + * to access the BARs ourselves.
> + */
> + ret = viommu_pci_find_capability(dev, VIRTIO_PCI_CAP_COMMON_CFG, &cap);
> + if (!ret) {
> + pci_warn(dev, "common capability not found\n");
Is the lack of this capability really an error, i.e., is this
pci_warn() or pci_info()? The "device doesn't have topology
description" below is only pci_dbg(), which suggests that we can live
without this.
Maybe a hint about what "common capability" means?
> + return;
> + }
> +
> + if (pci_enable_device_mem(dev))
> + return;
> +
> +...
2023 Mar 16
1
[PATCH] PCI: stop spamming info in quirk_nvidia_hda
...I do see comments like these:
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1836308/comments/15
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2002206
that suggest the message happens frequently, maybe if we're resuming
the controller after runtime suspend?
Maybe this should be a pci_info_once() sort of thing? I think there's
some value in knowing that we're changing the BIOS configuration
outside the purview of a driver, since I assume BIOS had some reason
for hiding the HDA controller.
> Cc: Bjorn Helgaas <bhelgaas at google.com>
> Cc: Lukas Wunner <lukas...
2010 Jun 28
8
[PATCH] add xl ocaml bindings
...nd_domid : domid;
+ devid : int;
+}
+
+type vfb_info =
+{
+ backend_domid : domid;
+ devid : int;
+ vnc : bool;
+ vnclisten : string;
+ vncpasswd : string;
+ vncdisplay : int;
+ vncunused : bool;
+ keymap : string;
+ sdl : bool;
+ opengl : bool;
+ display : string;
+ xauthority : string;
+}
+
+type pci_info =
+{
+ v : int; (* domain * bus * dev * func multiplexed *)
+ domain : int;
+ vdevfn : int;
+ msitranslate : bool;
+ power_mgmt : bool;
+}
+
+type physinfo =
+{
+ threads_per_core: int;
+ cores_per_socket: int;
+ max_cpu_id: int;
+ nr_cpus: int;
+ cpu_khz: int;
+ total_pages: int64;
+ free_pages: i...
2013 Jul 24
4
[PATCH 2/3] V5 qemu-xen-trad: Correctly expose PCH ISA bridge for IGD passthrough
...t_dev->config[PCI_HEADER_TYPE] = 0x80;
+ return s;
+}
+
int pt_chk_bar_overlap(PCIBus *bus, int devfn, uint32_t addr,
uint32_t size, uint8_t type)
{
diff --git a/hw/pci.h b/hw/pci.h
index edc58b6..cacbdd2 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -271,6 +271,9 @@ void pci_info(void);
PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
uint8_t rid, pci_map_irq_fn map_irq, const char *name);
+PCIBus *pci_isa_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
+ uint8_t rid, pci_map_ir...
2020 Sep 25
0
[PATCH v3 5/6] iommu/virtio: Support topology description in config space
...rselves.
> > + */
> > + ret = viommu_pci_find_capability(dev, VIRTIO_PCI_CAP_COMMON_CFG, &cap);
> > + if (!ret) {
> > + pci_warn(dev, "common capability not found\n");
>
> Is the lack of this capability really an error, i.e., is this
> pci_warn() or pci_info()? The "device doesn't have topology
> description" below is only pci_dbg(), which suggests that we can live
> without this.
At this point we know that this is a (modern) virtio-pci device which,
according to the virtio 1.0 specification, must have this capability. So
this is...
2019 Jul 31
3
[PATCH] Revert "PCI: Enable NVIDIA HDA controllers"
...r_type;
- u32 val;
-
- /* There was no integrated HDA controller before MCP89 */
- if (gpu->device < PCI_DEVICE_ID_NVIDIA_GEFORCE_320M)
- return;
-
- /* Bit 25 at offset 0x488 enables the HDA controller */
- pci_read_config_dword(gpu, 0x488, &val);
- if (val & BIT(25))
- return;
-
- pci_info(gpu, "Enabling HDA controller\n");
- pci_write_config_dword(gpu, 0x488, val | BIT(25));
-
- /* The GPU becomes a multi-function device when the HDA is enabled */
- pci_read_config_byte(gpu, PCI_HEADER_TYPE, &hdr_type);
- gpu->multifunction = !!(hdr_type & 0x80);
-}
-DECLARE_PCI...
2019 May 23
0
[PATCH 5.0 087/139] PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...
2019 May 23
0
[PATCH 5.1 096/122] PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...
2019 Sep 13
0
[PATCH 4.19 125/190] PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...
2019 Sep 03
0
[PATCH AUTOSEL 4.19 104/167] PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...
2019 Jul 10
0
[PATCH v2] PCI: Expose hidden NVIDIA HDA controllers
...r_type;
+ u32 val;
+
+ /* There was no integrated HDA controller before MCP89 */
+ if (gpu->device < PCI_DEVICE_ID_NVIDIA_GEFORCE_320M)
+ return;
+
+ /* Bit 25 at offset 0x488 enables the HDA controller */
+ pci_read_config_dword(gpu, 0x488, &val);
+ if (val & BIT(25))
+ return;
+
+ pci_info(gpu, "Enabling HDA controller\n");
+ pci_write_config_dword(gpu, 0x488, val | BIT(25));
+
+ /* The GPU becomes a multi-function device when the HDA is enabled */
+ pci_read_config_byte(gpu, PCI_HEADER_TYPE, &hdr_type);
+ gpu->multifunction = !!(hdr_type & 0x80);
+}
+DECLARE_PCI...
2019 May 23
0
Patch "PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary" has been added to the 5.0-stable tree
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...
2019 May 23
0
Patch "PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary" has been added to the 5.1-stable tree
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...
2019 Apr 24
1
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
...ngine/device/base.c
+ */
+ map = pci_iomap(pdev, 0, 0x23000);
+ if (!map) {
+ pci_err(pdev, "Can't map MMIO space\n");
+ goto out_disable;
+ }
+
+ /*
+ * Make sure the GPU looks like it's been POSTed before resetting
+ * it.
+ */
+ if (ioread32(map + 0x2240c) & 0x2) {
+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
+ ret = pci_reset_function(pdev);
+ if (ret < 0)
+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
+ }
+
+ iounmap(map);
+out_disable:
+ pci_disable_device(pdev);
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NV...