search for: pci_domain_nr

...nouveau/dispnv04/arb.c +++ b/drivers/gpu/drm/nouveau/dispnv04/arb.c @@ -213,8 +213,10 @@ struct nv_sim_state { if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ || (dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) { uint32_t type; + int domain = pci_domain_nr(dev->pdev->bus); - pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type); + pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 1), + 0x7c, &type); sim_data.memory_type = (type >> 12) & 1; sim_data.memory_width = 64; diff --git a/driver...

...nouveau/dispnv04/arb.c +++ b/drivers/gpu/drm/nouveau/dispnv04/arb.c @@ -213,8 +213,10 @@ struct nv_sim_state { if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ || (dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) { uint32_t type; + int domain = pci_domain_nr(dev->pdev->bus); - pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type); + pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 1), + 0x7c, &type); sim_data.memory_type = (type >> 12) & 1; sim_data.memory_width = 64; diff --git a/driver...

...nouveau/dispnv04/arb.c +++ b/drivers/gpu/drm/nouveau/dispnv04/arb.c @@ -213,8 +213,10 @@ struct nv_sim_state { if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ || (dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) { uint32_t type; + u32 domain = pci_domain_nr(dev->pdev->bus); - pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type); + pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 1), + 0x7c, &type); sim_data.memory_type = (type >> 12) & 1; sim_data.memory_width = 64; diff --git a/driver...

...+ b/drivers/gpu/drm/nouveau/dispnv04/arb.c > @@ -213,8 +213,10 @@ struct nv_sim_state { > if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ || > (dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) { > uint32_t type; > + int domain = pci_domain_nr(dev->pdev->bus); > > - pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type); > + pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 1), > + 0x7c, &type); > > sim_data.memory_type = (type >> 12) & 1; > sim_data.mem...

...nding on the size of longs in struct physdev_apic. 399 } 400 return rc; 401 } One example of this is in xen_initdom_restore_msi_irqs(). arch/x86/pci/xen.c 337 struct physdev_pci_device restore_ext; 338 339 restore_ext.seg = pci_domain_nr(dev->bus); 340 restore_ext.bus = dev->bus->number; 341 restore_ext.devfn = dev->devfn; 342 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext, 343 &restore_ext);...

...nding on the size of longs in struct physdev_apic. 399 } 400 return rc; 401 } One example of this is in xen_initdom_restore_msi_irqs(). arch/x86/pci/xen.c 337 struct physdev_pci_device restore_ext; 338 339 restore_ext.seg = pci_domain_nr(dev->bus); 340 restore_ext.bus = dev->bus->number; 341 restore_ext.devfn = dev->devfn; 342 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext, 343 &restore_ext);...

...nding on the size of longs in struct physdev_apic. 399 } 400 return rc; 401 } One example of this is in xen_initdom_restore_msi_irqs(). arch/x86/pci/xen.c 337 struct physdev_pci_device restore_ext; 338 339 restore_ext.seg = pci_domain_nr(dev->bus); 340 restore_ext.bus = dev->bus->number; 341 restore_ext.devfn = dev->devfn; 342 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext, 343 &restore_ext);...

First, maintainer''s addresses (Ryan Wilson <hap9@epoch.ncsc.mil>, Chris Bookholt <hap10@epoch.ncsc.mil>) are wrong (users unknown to remote mailsystem), so posting to you: PCI bus format strings are wrong. "%04x:%02x:%02x.%d" should be used instead of "%04x:%02x:%02x.%1x" (in many places of linux+v3.2.1/drivers/xen/xen-pciback/pci_stub.c) --

...default (unless pm_runtime_irq_safe() was called). > > +static void quirk_gpu_hda(struct pci_dev *hda) > > +{ > > + struct pci_dev *gpu = NULL; > > + > > + if (PCI_FUNC(hda->devfn) != 1) > > + return; > > + > > + gpu = pci_get_domain_bus_and_slot(pci_domain_nr(hda->bus), > > Unnecessary initialization. Thanks for spotting this, it's a remnant of an earlier version of the patch which called pci_dev_put(gpu) in the (PCI_FUNC(hda->devfn) != 1) case. Best regards, Lukas

...pci_dev *pdev; + struct iort_fwnode *curr; + struct iort_pci_devid *devid; + + if (!dev_is_pci(dev)) + return; + + pdev = to_pci_dev(dev); + + spin_lock(&iort_fwnode_lock); + list_for_each_entry(curr, &iort_fwnode_list, list) { + devid = curr->pci_devid; + if (devid && + pci_domain_nr(pdev->bus) == devid->segment && + pdev->bus->number == devid->bus && + pdev->devfn == devid->devfn) { + WARN_ON(fwnode && curr->fwnode); + curr->fwnode = fwnode; + break; + } + } + spin_unlock(&iort_fwnode_lock); +} +EXPORT_SYM...

.../drivers/gpu/drm/nouveau/nouveau_drm.c @@ -406,7 +406,8 @@ static int nouveau_drm_probe(struct pci_dev *pdev, } /* subfunction one is a hdmi audio device? */ - drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, + drm->hdmi_device = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), + (unsigned int)pdev->bus->number, PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); if (!drm->hdmi_device) { diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.c index 3c6a871..3d2a203 100644 --- a/drivers/g...

...p) +{ + const struct device *ctrlr = hcd_to_bus(hcd)->controller; + struct physdev_dbgp_op dbgp; + + if (!xen_initial_domain()) + return 0; + + dbgp.op = op; + +#ifdef CONFIG_PCI + if (ctrlr->bus == &pci_bus_type) { + const struct pci_dev *pdev = to_pci_dev(ctrlr); + + dbgp.u.pci.seg = pci_domain_nr(pdev->bus); + dbgp.u.pci.bus = pdev->bus->number; + dbgp.u.pci.devfn = pdev->devfn; + dbgp.bus = PHYSDEVOP_DBGP_BUS_PCI; + } else +#endif + dbgp.bus = PHYSDEVOP_DBGP_BUS_UNKNOWN; + + return HYPERVISOR_physdev_op(PHYSDEVOP_dbgp_op, &dbgp); +} + +int xen_dbgp_reset_prep(struct usb...

This v4 is now a 3 piece series (since v4), after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In

...*/ > tmp = pci_find_upstream_pcie_bridge(pdev); > if (!tmp) > return 0; > ... > if (pci_is_pcie(tmp)) /* this is a PCIe-to-PCI bridge */ > return domain_context_mapping_one(domain, > pci_domain_nr(tmp->subordinate), > tmp->subordinate->number, 0, > translation); > else /* this is a legacy PCI bridge */ > return domain_context_mapping_one(domain, >...

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

...); +static DEFINE_MUTEX(viommus_lock); + +static bool virt_topo_device_match(struct device *dev, + struct virt_topo_dev_id *id) +{ + if (id->type == VIRT_TOPO_DEV_TYPE_PCI && dev_is_pci(dev)) { + struct pci_dev *pdev = to_pci_dev(dev); + u16 dev_id = pci_dev_id(pdev); + + return pci_domain_nr(pdev->bus) == id->segment && + dev_id >= id->bdf_start && + dev_id <= id->bdf_end; + } else if (id->type == VIRT_TOPO_DEV_TYPE_MMIO && + dev_is_platform(dev)) { + struct platform_device *plat_dev = to_platform_device(dev); + struct resource *me...

...+ * to prevent it from permanently keeping the GPU awake. > + */ > +static void quirk_gpu_hda(struct pci_dev *hda) > +{ > + struct pci_dev *gpu = NULL; Unnecessary initialization. > + if (PCI_FUNC(hda->devfn) != 1) > + return; > + > + gpu = pci_get_domain_bus_and_slot(pci_domain_nr(hda->bus), > + hda->bus->number, > + PCI_DEVFN(PCI_SLOT(hda->devfn), 0)); > + if (!gpu || (gpu->class >> 16) != PCI_BASE_CLASS_DISPLAY) { > + pci_dev_put(gpu); > + return; > + } > + > + if (!device_link_add(&hda->dev, &gpu->de...

...> +static bool virt_topo_device_match(struct device *dev, > + struct virt_topo_dev_id *id) > +{ > + if (id->type == VIRT_TOPO_DEV_TYPE_PCI && dev_is_pci(dev)) { > + struct pci_dev *pdev = to_pci_dev(dev); > + u16 dev_id = pci_dev_id(pdev); > + > + return pci_domain_nr(pdev->bus) == id->segment && > + dev_id >= id->bdf_start && > + dev_id <= id->bdf_end; > + } else if (id->type == VIRT_TOPO_DEV_TYPE_MMIO && > + dev_is_platform(dev)) { > + struct platform_device *plat_dev = to_platform_device(dev...