search for: pci_dbg

...es, struct pci_dev, > bus_list); > @@ -4715,7 +4710,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) > * management for them (see pci_bridge_d3_possible()). > */ > if (!pci_is_pcie(dev)) { > - pci_dbg(dev, "waiting %d ms for secondary bus\n", 1000 + delay); > + pci_info(dev, "waiting %d ms for secondary bus\n", 1000 + delay); > msleep(1000 + delay); > return; > } > @@ -4741,10 +4736,10 @@ void pci_bridge_wai...

...turn; - } + delay = 500; child = list_first_entry(&dev->subordinate->devices, struct pci_dev, bus_list); @@ -4715,7 +4710,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) * management for them (see pci_bridge_d3_possible()). */ if (!pci_is_pcie(dev)) { - pci_dbg(dev, "waiting %d ms for secondary bus\n", 1000 + delay); + pci_info(dev, "waiting %d ms for secondary bus\n", 1000 + delay); msleep(1000 + delay); return; } @@ -4741,10 +4736,10 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) return; if (pcie_get_s...

On Wed, Nov 20, 2019 at 04:37:14PM +0100, Karol Herbst wrote: > On Wed, Nov 20, 2019 at 4:15 PM Mika Westerberg > <mika.westerberg at intel.com> wrote: > > > > On Wed, Nov 20, 2019 at 01:11:52PM +0100, Karol Herbst wrote: > > > On Wed, Nov 20, 2019 at 1:09 PM Mika Westerberg > > > <mika.westerberg at intel.com> wrote: > > > > > >

...pci/quirks.c b/drivers/pci/quirks.c index 44cab813bf951..b10c77bbe4716 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5549,7 +5549,7 @@ static void quirk_nvidia_hda(struct pci_dev *gpu) if (val & BIT(25)) return; - pci_info(gpu, "Enabling HDA controller\n"); + pci_dbg(gpu, "Enabling HDA controller\n"); pci_write_config_dword(gpu, 0x488, val | BIT(25)); /* The GPU becomes a multi-function device when the HDA is enabled */ -- 2.39.2

...bility(dev, VIRTIO_PCI_CAP_COMMON_CFG, &cap); > + if (!ret) { > + pci_warn(dev, "common capability not found\n"); Is the lack of this capability really an error, i.e., is this pci_warn() or pci_info()? The "device doesn't have topology description" below is only pci_dbg(), which suggests that we can live without this. Maybe a hint about what "common capability" means? > + return; > + } > + > + if (pci_enable_device_mem(dev)) > + return; > + > + common_regs = pci_iomap(dev, cap.bar, 0); > + if (!common_regs) > + return; &gt...

...bility(dev, VIRTIO_PCI_CAP_COMMON_CFG, &cap); > + if (!ret) { > + pci_warn(dev, "common capability not found\n"); Is the lack of this capability really an error, i.e., is this pci_warn() or pci_info()? The "device doesn't have topology description" below is only pci_dbg(), which suggests that we can live without this. Maybe a hint about what "common capability" means? > + return; > + } > + > + if (pci_enable_device_mem(dev)) > + return; > + > + common_regs = pci_iomap(dev, cap.bar, 0); > + if (!common_regs) > + return; &gt...

...x 44cab813bf951..b10c77bbe4716 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -5549,7 +5549,7 @@ static void quirk_nvidia_hda(struct pci_dev *gpu) > if (val & BIT(25)) > return; > > - pci_info(gpu, "Enabling HDA controller\n"); > + pci_dbg(gpu, "Enabling HDA controller\n"); > pci_write_config_dword(gpu, 0x488, val | BIT(25)); > > /* The GPU becomes a multi-function device when the HDA is enabled */ > -- > 2.39.2 >

...u32 saved_val, int retry) + u32 saved_val, int retry, bool force) { u32 val; - pci_read_config_dword(pdev, offset, &val); - if (val == saved_val) - return; + if (!force) { + pci_read_config_dword(pdev, offset, &val); + if (val == saved_val) + return; + } for (;;) { pci_dbg(pdev, "restoring config space at offset %#x (was %#x, writing %#x)\n", @@ -1313,25 +1315,34 @@ static void pci_restore_config_dword(struct pci_dev *pdev, int offset, } static void pci_restore_config_space_range(struct pci_dev *pdev, - int start, int end, int retry) + int...

...MON_CFG, &cap); > > + if (!ret) { > > + pci_warn(dev, "common capability not found\n"); > > Is the lack of this capability really an error, i.e., is this > pci_warn() or pci_info()? The "device doesn't have topology > description" below is only pci_dbg(), which suggests that we can live > without this. At this point we know that this is a (modern) virtio-pci device which, according to the virtio 1.0 specification, must have this capability. So this is definitely an error, but the topology description is an optional feature. > > Maybe...

...- if (val == saved_val) > - return; > + if (!force) { > + pci_read_config_dword(pdev, offset, &val); > + if (val == saved_val) > + return; > + } > > for (;;) { > pci_dbg(pdev, "restoring config space at offset %#x (was %#x, writing %#x)\n", > @@ -1313,25 +1315,34 @@ static void pci_restore_config_dword(struct pci_dev *pdev, int offset, > } > > static void pci_restore_config_space_range(struct pci_dev *pdev, > -...

..._CONFIG_S_DRIVER, + &common_cfg->device_status); + + /* Find out if the device supports topology description */ + iowrite32(0, &common_cfg->device_feature_select); + features = ioread32(&common_cfg->device_feature); + + if (!(features & BIT(VIRTIO_IOMMU_F_TOPOLOGY))) { + pci_dbg(dev, "device doesn't have topology description"); + goto out_reset; + } + + ret = viommu_pci_find_capability(dev, VIRTIO_PCI_CAP_DEVICE_CFG, &cap); + if (!ret) { + pci_warn(dev, "device config capability not found\n"); + goto out_reset; + } + + regs = pci_iomap(dev, c...

...fg->device_status); > + > + /* Find out if the device supports topology description */ > + iowrite32(0, &common_cfg->device_feature_select); > + features = ioread32(&common_cfg->device_feature); > + > + if (!(features & BIT(VIRTIO_IOMMU_F_TOPOLOGY))) { > + pci_dbg(dev, "device doesn't have topology description"); > + goto out_reset; > + } > + > + ret = viommu_pci_find_capability(dev, VIRTIO_PCI_CAP_DEVICE_CFG, &cap); > + if (!ret) { > + pci_warn(dev, "device config capability not found\n"); > + goto out_res...

...gt; > + > > + /* > > + * If we can't enable the device's mmio space, it's probably not even > > + * initialized. This is fine, and means we can just skip the quirk > > + * entirely. > > + */ > > + if (pci_enable_device_mem(pdev)) { > > + pci_dbg(pdev, "Can't enable device mem, no reset needed\n"); > > + return; > > + } > > + > > + /* Taken from drivers/gpu/drm/nouveau/engine/device/base.c */ > > + map = ioremap(pci_resource_start(pdev, 0), 0x102000); > > + if (!map) { > > + pci_err(...

On over 40 Intel-based Asus products, the nvidia GPU becomes unusable after S3 suspend/resume. The affected products include multiple generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs many errors such as: fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 [HUB/FE] reason 4a [] on channel -1 [007fa91000 unknown] DRM: failed to idle channel 0 [DRM]

...pdev->subsystem_device != 0x222e || + !pdev->reset_fn) + return; + + /* + * If we can't enable the device's mmio space, it's probably not even + * initialized. This is fine, and means we can just skip the quirk + * entirely. + */ + if (pci_enable_device_mem(pdev)) { + pci_dbg(pdev, "Can't enable device mem, no reset needed\n"); + return; + } + + /* Taken from drivers/gpu/drm/nouveau/engine/device/base.c */ + map = ioremap(pci_resource_start(pdev, 0), 0x102000); + if (!map) { + pci_err(pdev, "Can't map MMIO space, this is probably very bad\n&quot...

...'t enable the device's mmio space, it's probably not even > > > > + * initialized. This is fine, and means we can just skip the quirk > > > > + * entirely. > > > > + */ > > > > + if (pci_enable_device_mem(pdev)) { > > > > + pci_dbg(pdev, "Can't enable device mem, no reset needed\n"); > > > > + return; > > > > + } > > > > + > > > > + /* Taken from drivers/gpu/drm/nouveau/engine/device/base.c */ > > > > + map = ioremap(pci_resource_start(pdev, 0), 0x1020...

Add a topology description to the virtio-iommu driver and enable x86 platforms. Since [v2] we have made some progress on adding ACPI support for virtio-iommu, which is the preferred boot method on x86. It will be a new vendor-agnostic table describing para-virtual topologies in a minimal format. However some platforms don't use either ACPI or DT for booting (for example microvm), and will

Add a topology description to the virtio-iommu driver and enable x86 platforms. Since [v2] we have made some progress on adding ACPI support for virtio-iommu, which is the preferred boot method on x86. It will be a new vendor-agnostic table describing para-virtual topologies in a minimal format. However some platforms don't use either ACPI or DT for booting (for example microvm), and will

...!pdev->reset_fn) > + return; > + > + /* > + * If we can't enable the device's mmio space, it's probably not even > + * initialized. This is fine, and means we can just skip the quirk > + * entirely. > + */ > + if (pci_enable_device_mem(pdev)) { > + pci_dbg(pdev, "Can't enable device mem, no reset needed\n"); > + return; > + } > + > + /* Taken from drivers/gpu/drm/nouveau/engine/device/base.c */ > + map = ioremap(pci_resource_start(pdev, 0), 0x102000); > + if (!map) { > + pci_err(pdev, "Can't map MMIO spac...

...+ /* Find out if the device supports topology description */ > + writel(0, &common_cfg->device_feature_select); > + features = ioread32(&common_cfg->device_feature); > + > + pci_iounmap(dev, regs); > + > + if (!(features & BIT(VIRTIO_IOMMU_F_TOPOLOGY))) { > + pci_dbg(dev, "device doesn't have topology description"); > + return; > + } > + > + pos = viommu_pci_find_capability(dev, VIRTIO_PCI_CAP_DEVICE_CFG, &cap); > + if (!pos) { > + pci_warn(dev, "device config capability not found\n"); > + return; > + } &gt...