search for: pci_bus_sem

...ddr = (dev->bus->number << 8) + dev->devfn + + dev->iov->offset + dev->iov->stride * id; + *busnr = addr >> 8; + *devfn = addr & 0xff; +} + +static inline struct pci_bus *find_bus(struct pci_dev *dev, int busnr) +{ + struct pci_bus *bus; + + down_read(&pci_bus_sem); + list_for_each_entry(bus, &dev->bus->children, node) + if (bus->number == busnr) { + up_read(&pci_bus_sem); + return bus; + } + up_read(&pci_bus_sem); + + return NULL; +} + +static int alloc_virtfn(struct pci_dev *dev, int id) +{ + int i; + int rc; + u8 busnr, devfn; +...

...ddr = (dev->bus->number << 8) + dev->devfn + + dev->iov->offset + dev->iov->stride * id; + *busnr = addr >> 8; + *devfn = addr & 0xff; +} + +static inline struct pci_bus *find_bus(struct pci_dev *dev, int busnr) +{ + struct pci_bus *bus; + + down_read(&pci_bus_sem); + list_for_each_entry(bus, &dev->bus->children, node) + if (bus->number == busnr) { + up_read(&pci_bus_sem); + return bus; + } + up_read(&pci_bus_sem); + + return NULL; +} + +static int alloc_virtfn(struct pci_dev *dev, int id) +{ + int i; + int rc; + u8 busnr, devfn; +...

...ddr = (dev->bus->number << 8) + dev->devfn + + dev->iov->offset + dev->iov->stride * id; + *busnr = addr >> 8; + *devfn = addr & 0xff; +} + +static inline struct pci_bus *find_bus(struct pci_dev *dev, int busnr) +{ + struct pci_bus *bus; + + down_read(&pci_bus_sem); + list_for_each_entry(bus, &dev->bus->children, node) + if (bus->number == busnr) { + up_read(&pci_bus_sem); + return bus; + } + up_read(&pci_bus_sem); + + return NULL; +} + +static int alloc_virtfn(struct pci_dev *dev, int id) +{ + int i; + int rc; + u8 busnr, devfn; +...

...us->devices, bus_list) { - BUG_ON(!dev->is_added); /* * If there is an unattached subordinate bus, attach * it and then scan for unattached PCI devices. */ - if (dev->subordinate) { - if (list_empty(&dev->subordinate->node)) { - down_write(&pci_bus_sem); - list_add_tail(&dev->subordinate->node, - &dev->bus->children); - up_write(&pci_bus_sem); - } - pci_bus_add_devices(dev->subordinate); - - /* register the bus with sysfs as the parent is now - * properly registered. */ - child_bu...

...us->devices, bus_list) { - BUG_ON(!dev->is_added); /* * If there is an unattached subordinate bus, attach * it and then scan for unattached PCI devices. */ - if (dev->subordinate) { - if (list_empty(&dev->subordinate->node)) { - down_write(&pci_bus_sem); - list_add_tail(&dev->subordinate->node, - &dev->bus->children); - up_write(&pci_bus_sem); - } - pci_bus_add_devices(dev->subordinate); - - /* register the bus with sysfs as the parent is now - * properly registered. */ - child_bu...

...us->devices, bus_list) { - BUG_ON(!dev->is_added); /* * If there is an unattached subordinate bus, attach * it and then scan for unattached PCI devices. */ - if (dev->subordinate) { - if (list_empty(&dev->subordinate->node)) { - down_write(&pci_bus_sem); - list_add_tail(&dev->subordinate->node, - &dev->bus->children); - up_write(&pci_bus_sem); - } - pci_bus_add_devices(dev->subordinate); - - /* register the bus with sysfs as the parent is now - * properly registered. */ - child_bu...

...n), PCI_FUNC(devfn)); +} + +static struct iov_attr vf_attr = __ATTR_RO(rid); + +int iov_alloc_bus(struct pci_bus *bus, int busnr) +{ + int i; + int rc = 0; + struct pci_bus *child, *next; + struct list_head head; + + INIT_LIST_HEAD(&head); + + down_write(&pci_bus_sem); + + for (i = bus->number + 1; i <= busnr; i++) { + list_for_each_entry(child, &bus->children, node) + if (child->number == i) + break; + if (child->number == i) + continu...

...n), PCI_FUNC(devfn)); +} + +static struct iov_attr vf_attr = __ATTR_RO(rid); + +int iov_alloc_bus(struct pci_bus *bus, int busnr) +{ + int i; + int rc = 0; + struct pci_bus *child, *next; + struct list_head head; + + INIT_LIST_HEAD(&head); + + down_write(&pci_bus_sem); + + for (i = bus->number + 1; i <= busnr; i++) { + list_for_each_entry(child, &bus->children, node) + if (child->number == i) + break; + if (child->number == i) + continu...

...n), PCI_FUNC(devfn)); +} + +static struct iov_attr vf_attr = __ATTR_RO(rid); + +int iov_alloc_bus(struct pci_bus *bus, int busnr) +{ + int i; + int rc = 0; + struct pci_bus *child, *next; + struct list_head head; + + INIT_LIST_HEAD(&head); + + down_write(&pci_bus_sem); + + for (i = bus->number + 1; i <= busnr; i++) { + list_for_each_entry(child, &bus->children, node) + if (child->number == i) + break; + if (child->number == i) + continu...

...oid pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) > return; > } > > - /* Take d3cold_delay requirements into account */ > - delay = pci_bus_max_d3cold_delay(dev->subordinate); > - if (!delay) { > - up_read(&pci_bus_sem); > - return; > - } > + delay = 500; > > child = list_first_entry(&dev->subordinate->devices, struct pci_dev, > bus_list); > @@ -4715,7 +4710,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev...

...ed5 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4697,12 +4697,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) return; } - /* Take d3cold_delay requirements into account */ - delay = pci_bus_max_d3cold_delay(dev->subordinate); - if (!delay) { - up_read(&pci_bus_sem); - return; - } + delay = 500; child = list_first_entry(&dev->subordinate->devices, struct pci_dev, bus_list); @@ -4715,7 +4710,7 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) * management for them (see pci_bridge_d3_possible()). */ if (!pci_is_pcie(dev...

...> 2 files changed, 205 insertions(+) >> > >> > diff --git a/drivers/pci/search.c b/drivers/pci/search.c >> > index d0627fa..4759c02 100644 >> > --- a/drivers/pci/search.c >> > +++ b/drivers/pci/search.c >> > @@ -18,6 +18,204 @@ DECLARE_RWSEM(pci_bus_sem); >> > EXPORT_SYMBOL_GPL(pci_bus_sem); >> > >> > /* >> > + * pci_has_pcie_requester_id - Does @dev have a PCIe requester ID >> > + * @dev: device to test >> > + */ >> > +static bool pci_has_pcie_requester_id(struct pci_dev *dev) >&...

On Wed, Nov 20, 2019 at 04:37:14PM +0100, Karol Herbst wrote: > On Wed, Nov 20, 2019 at 4:15 PM Mika Westerberg > <mika.westerberg at intel.com> wrote: > > > > On Wed, Nov 20, 2019 at 01:11:52PM +0100, Karol Herbst wrote: > > > On Wed, Nov 20, 2019 at 1:09 PM Mika Westerberg > > > <mika.westerberg at intel.com> wrote: > > > > > >

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding