search for: pbdma

A channel may still be processed by the PBDMA even after removal, unless it is properly kicked. Some chips are more sensible to this than others, with GM20B triggering the issue very easily (the PBDMA will try to fetch methods from the previously-removed channel after a new one is added). Make sure this cannot happen by kicking the channel ri...

Hi there, Resending these now that they've had some more polish and testing, and I heard that Ben's vacation is over :-) These patches work as a starting point for more explicit error mechanisms and better robustness. At the moment, when a job hangs or faults, it seems that nouveau doesn't quite know how to handle the situation and often results in a hang. Some of these situations

...TREN */ } - nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12); + /* obsolete on GV100 and later */ + if (fifo->user.bar) { + u32 value = 0x10000000 | fifo->user.bar->addr >> 12; + + nvkm_wr32(device, 0x002254, value); + } if (fifo->func->pbdma->init_timeout) fifo->func->pbdma->init_timeout(fifo); @@ -1014,7 +1025,9 @@ gk104_fifo_dtor(struct nvkm_fifo *base) struct nvkm_device *device = fifo->base.engine.subdev.device; int i; - nvkm_vmm_put(nvkm_bar_bar1_vmm(device), &fifo->user.bar); + if (fifo->user.bar...

...of lp3 setting cb1567c drm/nve0/fifo: recover from mmu faults on bar1/bar3 649ec92 drm/nve0/fifo: keep mmu fault interrupts enabled at all times e1b6b14 drm/nve0/fifo: update human-readable mmu fault descriptions e9fb980 drm/nve0/fifo: document more intr status bits 9f8459c drm/nve0/fifo: populate PBDMA status bitfield with more definitions 39b0554 drm/nve0/fifo: s/subfifo/PBDMA/ f82c44a drm/nve0/fifo: s/playlist/runlist/ f76dd80 drm/nvf0/gr: enable acceleration with our chsw ucode aa97cd3 drm/nv108/gr: enable acceleration with our chsw ucode 5d91e19 drm/nvc0-/gr: handle fwmthd interrupts in ucode...

https://bugs.freedesktop.org/show_bug.cgi?id=109341 Bug ID: 109341 Summary: Plasma Wayland locks up immediately on sign in Product: Mesa Version: 18.0 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: blocker Priority: medium Component: Drivers/DRI/nouveau

...shing whenever my monitors are going to sleep (happens always in my lunch time) - after returning its crashed and i need todo a hard reset to get the gpu running again. This is what is printed to dmesg when this happens (machine is still working via ssh): [11010.813785] nouveau 0000:01:00.0: fifo: PBDMA0: 04000100 [] ch 2 [001fcc0000 Xorg[2593]] subc 5 mthd 001c data 00000001 [11010.813815] nouveau 0000:01:00.0: fifo: PBDMA0: 04000000 [] ch 2 [001fcc0000 Xorg[2593]] subc 0 mthd 0010 data 00000000 [11010.813838] nouveau 0000:01:00.0: fifo: PBDMA0: 04000000 [] ch 2 [001fcc0000 Xorg[2593]] subc 0 mth...

...M] Pointer to flat panel table invalid [ 41.862779] nouveau D[ DMAOBJ][0000:01:00.0] reset [ 41.862815] nouveau D[ DEVICE][0000:01:00.0][0x80000080][ffff880002b39a00] illegal class 0xa06f [ 41.862824] nouveau D[ PFIFO][0000:01:00.0] reset [ 41.862827] nouveau D[ PFIFO][0000:01:00.0] 1 PBDMA unit(s) [ 41.868057] nouveau E[ PFIFO][0000:01:00.0] write fault at 0x0000080000 [INVALID_STORAGE_TYPE] from BAR1/BAR_WRITE on channel 0x3ffffedf000 [unknown] [ 41.868116] nouveau D[ DEVICE][0000:01:00.0][0x80000080][ffff880002b39a00] illegal class 0xa06f [ 41.873552] nouveau D[ SW][0...