search for: patterntomatch

Adding -debug to a -gen-dag-isel run can also print useful information about the parsed patterns. On Wed, Jul 15, 2020 at 10:44 AM Matt Arsenault via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > > On Jul 15, 2020, at 13:33, Rotate Right via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > Is there a backend to Tablegen which can dump a map of

On 3/30/2016 4:42 PM, Rail Shafigulin via llvm-dev wrote: > i'm getting a > > Could not infer all types in pattern! > > error in my backend. it is happening on the following instruction: > > VGETITEM: (set GPR:{i32:f32}:$rD, (extractelt:{i32:f32} > VR:{v4i32:v4f32}:$rA, GPR:i32:$rB)). > > how do i make it use appropriate types? in other words if it is f32 then

Could we expose predicates defined in the target InstrInfo.td file to the MachineVerifier? We use BuildMI() to create many instructions after ISEL, but the predicates are not being checked at this point. Thus, I could forget to check the target and build an instruction that is illegal for a specific configuration. In such a case it would be nice if the MachineVerifier could detect this for me.

...e + 27 7 libLLVMSupport.dylib 0x0000000108e8c9a2 abort + 18 8 libLLVMSupport.dylib 0x0000000108e8c981 __assert_rtn + 129 9 llvm-tblgen 0x000000010893f524 (anonymous namespace)::MatcherGen::EmitResultCode() + 964 10 llvm-tblgen 0x000000010893e12f llvm::ConvertPatternToMatcher(llvm::PatternToMatch const&, unsigned int, llvm::CodeGenDAGPatterns const&) + 143 11 llvm-tblgen 0x0000000108927ca5 (anonymous namespace)::DAGISelEmitter::run(llvm::raw_ostream&) + 3205 12 llvm-tblgen 0x0000000108926fd6 llvm::EmitDAGISel(llvm::RecordKeeper&...

...these patterns defined so far: def AADDMri { // Instruction MephInstr AGInstr dag OutOperandList = (outs AGRegs:$dst); dag InOperandList = (ins AGRegs:$a, i16imm:$b); list<dag> Pattern = [(set AGRegs:$dst, (add AGRegs:$a, imm:$b))]; ... } def DADDri { // Pattern Pat dag PatternToMatch = (add LSubRegs:$a, imm:$b); list<dag> ResultInstrs = [(asrsat (asextr (sextr iRSubRegs:$a), (XLoadImm imm:$b)), (i16 0))]; } where asrsat has LSubRegs as its output operand. Both patterns have the same complexity and they are located at different scopes. For these two patterns, tblgen...

...t; def AADDMri { // Instruction MephInstr AGInstr > dag OutOperandList = (outs AGRegs:$dst); > dag InOperandList = (ins AGRegs:$a, i16imm:$b); > list<dag> Pattern = [(set AGRegs:$dst, (add AGRegs:$a, imm:$b))]; > … > } > > def DADDri { // Pattern Pat > dag PatternToMatch = (add LSubRegs:$a, imm:$b); > list<dag> ResultInstrs = [(asrsat (asextr (sextr iRSubRegs:$a), (XLoadImm imm:$b)), (i16 0))]; > } > > where asrsat has LSubRegs as its output operand. Both patterns have the same complexity and they are located at different scopes. For these two p...

...tternNode*, unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:515:0 #20 0x00000000005b6271 (anonymous namespace)::MatcherGen::EmitMatcherCode(unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:559:0 #21 0x00000000005b8f4a llvm::ConvertPatternToMatcher(llvm::PatternToMatch const&amp;, unsigned int, llvm::CodeGenDAGPatterns const&amp;) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:1026:0 #22 0x000000000059db91 (anonymous namespace)::DAGISelEmitter::run(llvm::raw_ostream&amp;) /home/nancy/work/rpp_clang/llvm/uti...

..., unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:515:0 #20 0x00000000005b6271 (anonymous namespace)::MatcherGen::EmitMatcherCode(unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:559:0 #21 0x00000000005b8f4a llvm::ConvertPatternToMatcher(llvm::PatternToMatch const&amp;, unsigned int, llvm::CodeGenDAGPatterns const&amp;) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:1026:0 #22 0x000000000059db91 (anonymous namespace)::DAGISelEmitter::run(llvm::raw_ostream&amp;) /home/nancy/work/rpp_clang/llv...

On Mar 7, 2012, at 6:23 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Jim, > > Thanks for your response. > > Le 06/03/2012 22:54, Jim Grosbach a écrit : >> Hi Ivan, >> On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> >>> Hi, >>> >>> I'm facing a problem in llvm while porting it

..., unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:515:0 #20 0x00000000005b6271 (anonymous namespace)::MatcherGen::EmitMatcherCode(unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:559:0 #21 0x00000000005b8f4a llvm::ConvertPatternToMatcher(llvm::PatternToMatch const&amp;, unsigned int, llvm::CodeGenDAGPatterns const&amp;) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:1026:0 #22 0x000000000059db91 (anonymous namespace)::DAGISelEmitter::run(llvm::raw_ostream&amp;) /home/nancy/work/rpp_clang/llv...

Hi Jim, Thanks for your response. Le 06/03/2012 22:54, Jim Grosbach a écrit : > Hi Ivan, > On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: > >> Hi, >> >> I'm facing a problem in llvm while porting it to a new target and I'll >> need some support. >> We have 2 kind of register, one for general purposes (i.e.

..., unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:515:0 #20 0x00000000005b6271 (anonymous namespace)::MatcherGen::EmitMatcherCode(unsigned int) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:559:0 #21 0x00000000005b8f4a llvm::ConvertPatternToMatcher(llvm::PatternToMatch const&amp;, unsigned int, llvm::CodeGenDAGPatterns const&amp;) /home/nancy/work/rpp_clang/llvm/utils/TableGen/DAGISelMatcherGen.cpp:1026:0 #22 0x000000000059db91 (anonymous namespace)::DAGISelEmitter::run(llvm::raw_ostream&amp;) /home/nancy/work/rpp_clang/llv...