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...e right design decisions for the MachineModule feeding those passes? we are building a toolchain for real-time systems, including optimizations and analyses that deal with the machine-level code of entire real-time applications. we have implemented MachineModulePasses based on LLVM 3.4 (see the patmos-llvm repository of T-CREST). it is clearly not a final solution for wide-spread use, but it works with a few limitations. for instance, it is difficult to preserve analysis information and access it in a machine module pass. similarly, it is rather difficult to pass information from a machine mo...

...t to 3.3, and write some proper test-cases.. I won't have time to do this properly in the near future, but if anybody is interested, I can try to find the main commits and post them as they are. And if you are really curious, you can find the git-repository here: https://github.com/t-crest/patmos-llvm Kind regards, Stefan

Hi, I know that backend processes one function at a time, > is it somehow possible to do there a whole program analysis, > or could you give me some guidelines? > There are different kinds of LLVM passes: Those that process a function at a time (FunctionPass), but also those that work on the call graph (CallGraphSCCPass) or on an entire module (ModulePass). These are described in the

Hi, Thanks for your explanations! How is the big picture for supporting in-order VLIW architectures and the like though? I am asking because I am currently implementing instruction scheduling in our own backend for our custom Patmos processor, for which I need to support both branch delay slots and bundles, some restrictions regarding bundles. For the moment, I am quite happy with a simple bottom-up basic-block scheduler. I tried to use a combination of the DFAPacketizer and a simple delay-slot-filler pass first, but the r...

Hello, I am working on backend development and would like to utilize my target's MCAsmParser inside of an MCInst-level class implementation. I noticed that the AsmParser is registered with the target registry however I am having no luck grepping for a "template" of how to instantiate it and have yet to find specific documentation on how it is done. Any ideas or help is greatly

Hi Reed, On Jul 17, 2013, at 3:19 AM, Reed Kotler <rkotler at mips.com> wrote: > On 07/16/2013 06:01 PM, Reed Kotler wrote: >> The Eclipse indexer seems to get stuck in the Clang unittests/AST >> > > In Eclipse you can tell it that a given directory is derived, and then it won't try and index it. > > Probably the more complex clang tests are too involved

...in the past when I compiled LLVM with clang, but I think it works now with the latest clang/LLVM/gdb versions. You can find my code for pretty printing for GDB for LLVM together with some infos on how to setup Eclipse for debugging here, if you want to give it a go: https://github.com/t-crest/patmos-llvm/tree/master/utils/gdb Basically, you need to check out the 'python' folder somewhere, check out the 'gdbinit' file, modify the paths to your system and make your gdb load the gdbinit file (beware, the Eclipse Standard Process launcher and the GDB (DSF) launcher seem to beha...

Hello everyone, we are planning to implement a stronger alias analysis for backend, because e.g. for VLIW architectures, this is our main performance limitation. I would have 2 questions regarding this. I know that backend processes one function at a time, is it somehow possible to do there a whole program analysis, or could you give me some guidelines? Which alias analysis algorithm

On 07/16/2013 06:01 PM, Reed Kotler wrote: > The Eclipse indexer seems to get stuck in the Clang unittests/AST > In Eclipse you can tell it that a given directory is derived, and then it won't try and index it. Probably the more complex clang tests are too involved for the indexer. >>> Hope this helps :) >>> >>> Regards, >>> >>> Tilmann

In my last message, I explained the goals of the generic MI scheduler and current status. This week, I'll see if we can enable MI scheduling by default for x86. I'm not sure which flags you're using to test it now. But by making it default and enabling the corresponding coalescer changes, we can be confident that benchmarking efforts are improving on the same baseline. At that point, I

Hi Abhishek, On Sunday, July 29, 2012 18:32:11 AbhishekR wrote: > It seems like I may have to modify the way MachineFunction is instantiated in MachineFunctionAnalysis. Instead of doing it per Function, it may have to be done for the entire Module by instantiating MachineFunction objects for every Function inside the Module. This might require major changes to the PassManager framework as well.

Hi all, I am trying to build a global control flow graph at machine code level. Essentially, I need the handles to the MachineFunction's corresponding to every call site inside a MachineFunction in order to get the handles to MachineBasicBlock's with return statements inside the callee. Currently, the codegen module processes one MachineFunction at a time and hence I can't find a way

Hi Andy, We have done some experimental evaluation of the different schedulers in LLVM 3.3 (source, BURR, ILP, fast, MI). The evaluation was done on x86-64 using SPEC CPU2006. We have measured both the amount of spill code as well as the execution time as detailed below. Here are our main findings: 1. The SD schedulers significantly impact the spill counts and the execution times for many