Displaying 2 results from an estimated 2 matches for "partialregisteroperationstestchar".
2011 Nov 24
2
[LLVMdev] x86 backend assembly - mov esp->reg
...onsistency with the x86 backend assembly output in how it treats arguments of a function. Here is a simple test to illustrate the inconsistency:
<from test.c>
void test()
{
char ac, bc, cc, dc, fc;
ac = (char)Rand();
bc = (char)Rand();
cc = (char)Rand();
dc = (char)Rand();
fc = PartialRegisterOperationsTestChar(ac, bc, cc, dc);
}
<from partialregisteroperations.c>
char PartialRegisterOperationsTestChar(char a, char b, char c, char d)
{
return a*b+c*d;
}
When compiled for atom with clang in 32-bit mode the 8-bit variables in test use 32-bit registers:
...
movl %ecx, 8(%esp)...
2011 Nov 24
0
[LLVMdev] x86 backend assembly - mov esp->reg
...u, Nov 24, 2011 at 11:39:32AM -0700, Nowicki, Tyler wrote:
> When compiled for atom with clang in 32-bit mode the 8-bit variables
> in test use 32-bit registers:
That's fine since it can avoid partial stales and the value of the
padding is undefined.
> However, the 8-bit variables in PartialRegisterOperationsTestChar use
> 8-bit registers:
Same argument. It wants to use the value of the 8bit registers, so
setting them up via 32bit ops could create a partial register stale.
Do you disagree?
Joerg