search for: paravirt_call_post

...t; +#define paravirt_opptr_type "p" > + > +/* > + * Alternative patching requires a maximum of 7 bytes but the relative call is > + * only 6 bytes. If PIE is enabled, add an additional nop to the call > + * instruction to ensure patching is possible. > + */ > +#define PARAVIRT_CALL_POST "nop;" I'm confused; where does the 7 come from? The relative call is 6 bytes, a normal call is 5 bytes (which is what we normally replace them with), and the longest 'native' sequence we seem to have is also 6 bytes (.cpu_usergs_sysret64). > +#else > +#define paravir...

...t; +#define paravirt_opptr_type "p" > + > +/* > + * Alternative patching requires a maximum of 7 bytes but the relative call is > + * only 6 bytes. If PIE is enabled, add an additional nop to the call > + * instruction to ensure patching is possible. > + */ > +#define PARAVIRT_CALL_POST "nop;" I'm confused; where does the 7 come from? The relative call is 6 bytes, a normal call is 5 bytes (which is what we normally replace them with), and the longest 'native' sequence we seem to have is also 6 bytes (.cpu_usergs_sysret64). > +#else > +#define paravir...

...ine paravirt_opptr_call "a" +#define paravirt_opptr_type "p" + +/* + * Alternative patching requires a maximum of 7 bytes but the relative call is + * only 6 bytes. If PIE is enabled, add an additional nop to the call + * instruction to ensure patching is possible. + */ +#define PARAVIRT_CALL_POST "nop;" +#else +#define paravirt_opptr_call "c" +#define paravirt_opptr_type "i" +#define PARAVIRT_CALL_POST "" +#endif + #define paravirt_type(op) \ [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ - [paravirt_opptr] "i" (&(pv_op...

...* instruction to ensure patching is possible. + * + * Without PIE, the call is reg/mem64: + * ff 14 25 68 37 02 82 callq *0xffffffff82023768 + * + * With PIE, it is relative to %rip and take 1-less byte: + * ff 15 fa d9 ff 00 callq *0xffd9fa(%rip) # <pv_ops+0x30> + * + */ +#define PARAVIRT_CALL_POST "nop;" +#else +#define paravirt_opptr_call "c" +#define paravirt_opptr_type "i" +#define PARAVIRT_CALL_POST "" +#endif + #define paravirt_type(op) \ [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ - [paravirt_opptr] "i" (&(pv_op...

Minor changes based on feedback and rebase from v8. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. -

Minor changes based on feedback and rebase from v8. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. -

Minor changes based on feedback and rebase from v9. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v10 (assembly): - Swap rax for rdx on entry/64 changes based on feedback. - Addressed feedback from Borislav Petkov on boot, paravirt, alternatives and

Minor changes based on feedback and rebase from v9. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v10 (assembly): - Swap rax for rdx on entry/64 changes based on feedback. - Addressed feedback from Borislav Petkov on boot, paravirt, alternatives and

Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chromium email address. - patch v7 (assembly): - Split patchset

Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chromium email address. - patch v7 (assembly): - Split patchset

...ot;p" > > + > > +/* > > + * Alternative patching requires a maximum of 7 bytes but the relative call is > > + * only 6 bytes. If PIE is enabled, add an additional nop to the call > > + * instruction to ensure patching is possible. > > + */ > > +#define PARAVIRT_CALL_POST "nop;" > > I'm confused; where does the 7 come from? The relative call is 6 bytes, Well, before it, the relative CALL is a CALL reg/mem64, i.e. the target is mem64. For example: ffffffff81025c45: ff 14 25 68 37 02 82 callq *0xffffffff82023768 That address there i...

On Wed, Dec 04, 2019 at 04:09:47PM -0800, Thomas Garnier wrote: > If PIE is enabled, switch the paravirt assembly constraints to be > compatible. The %c/i constrains generate smaller code so is kept by > default. > > Position Independent Executable (PIE) support will allow to extend the > KASLR randomization range below 0xffffffff80000000. > > Signed-off-by: Thomas