search for: pankaj

...unds good to me! I think 1) is legal as address wraparound in unsigned range doesn't make sense given a positive offset, but I am not sure. I think umax will not be added if we can prove the predicate as known. I am not sure whether umax will get simplified if we add nuw to the expressions. -Pankaj -----Original Message----- From: Sanjoy Das <sanjoy at playingwithpointers.com> Sent: Sunday, August 25, 2019 1:53 PM To: Chawla, Pankaj <pankaj.chawla at intel.com> Cc: Philip Reames <listmail at philipreames.com>; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] missing sim...

Hi Hal, In that case what is the best way to query whether there is a loop carried dependence between B[j] and A[j] at i-loop level? We were operating under the assumption of 'conservatively correct' behavior of alias analysis in the function scope? Thanks, Pankaj From: Finkel, Hal J. <hfinkel at anl.gov> Sent: Tuesday, March 17, 2020 11:50 AM To: Hiroshi Yamauchi <yamauchi at google.com>; Chawla, Pankaj <pankaj.chawla at intel.com> Cc: llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] valid BasicAA behavior? BasicAA should return a resu...

Hi Pankaj, On Tue, Mar 13, 2018 at 1:55 PM, Chawla, Pankaj <pankaj.chawla at intel.com> wrote: > Thanks for the reply! > Would it be possible for you to implement this? I don't have cycles for this right now, but if you file a bug I can give this a shot when I have time later. Even in the...

This sounds fine to me (and sorry for the delay!). -- Sanjoy On Mon, Mar 12, 2018 at 1:09 PM, Chawla, Pankaj <pankaj.chawla at intel.com> wrote: > Hi Sanjoy, > > So what is the verdict on this issue? > > Thanks, > Pankaj > > > -----Original Message----- > From: Chawla, Pankaj > Sent: Monday, February 26, 2018 11:12 AM > To: Sanjoy Das <sanjoy at playingwithpoin...

Hi Sanjoy, Thanks for the reply! Would it be possible for you to implement this? You know the codebase better than I do. Thanks, Pankaj -----Original Message----- From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] Sent: Tuesday, March 13, 2018 1:34 PM To: Chawla, Pankaj <pankaj.chawla at intel.com> Cc: Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov <serguei.katkov at azul.com>; llvm-dev at...

Thanks for the suggestion but datalayout info did not solve the problem! -Pankaj -----Original Message----- From: Philip Reames <listmail at philipreames.com> Sent: Tuesday, August 20, 2019 5:26 PM To: Chawla, Pankaj <pankaj.chawla at intel.com>; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] missing simplification in ScalarEvolution? Try adding a datalayout...

Hi Pankaj, On April 14, 2017 at 4:55:16 PM, Chawla, Pankaj (pankaj.chawla at intel.com) wrote: > I have attached the IR I got by compiling with -O2. This is just before we widen the IV. Thanks! > To get the backedge taken count info I ran indvars on it and then replaced zext with sext. > > I t...

What do you mean by "current top of tree"?   Pankaj ________________________________ From: Eric Christopher <echristo at apple.com> To: Pankaj Gode <godepankaj at yahoo.com> Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu> Sent: Monday, October 3, 2011 10:32 PM Subject: Re: [LLVMdev] collect end line number for sco...

...her to base pointer overlaps if the accessed range is known. LoopAccessAnalysis (for vectorization) does this. For the original example, if the loop outer loops is unrolled by an even factor, the non-overlapping becomes more obvious in SSA. Michael ________________________________ From: Chawla, Pankaj <pankaj.chawla at intel.com> Sent: Tuesday, March 17, 2020 16:03 To: Finkel, Hal J. <hfinkel at anl.gov>; Hiroshi Yamauchi <yamauchi at google.com> Cc: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org>; Kruse, Michael <michael.kruse at anl.gov> Subject: RE: [llvm...

...all other 'cheap' checks fail, we should decide by walking the dominator tree to see which instruction's basic block is encountered first from the function entry block. But we obviously cannot use this if we want ScalarEvolution to be stable around 'simple' CFG changes. Thanks, Pankaj -----Original Message----- From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] Sent: Tuesday, October 18, 2016 12:01 PM To: Chawla, Pankaj Cc: llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] [SCEV] inconsistent operand ordering Hi Pankaj, Chawla, Pankaj wrote: > Thanks for fixing...

...lexical block, and "endline" number is max line number associated with lexical block. 2. While "asm printing", traverse through the machine instruction and collect the information in similar way as 1.   I am not sure whether I should collect it from Clang AST nodes.   Regards, Pankaj     ________________________________ From: Devang Patel <dpatel at apple.com> To: Pankaj Gode <godepankaj at yahoo.com> Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu> Sent: Tuesday, October 4, 2011 10:08 PM Subject: Re: [LLVMdev] collect end line number for scope...

Hi, He is referring to current SVN head. Regards, Alex On Tue, Oct 4, 2011 at 12:08 PM, Pankaj Gode <godepankaj at yahoo.com> wrote: > What do you mean by "current top of tree"? > > Pankaj > From: Eric Christopher <echristo at apple.com> > To: Pankaj Gode <godepankaj at yahoo.com> > Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.ed...

Pankaj, If you want to decorate MachineInstrs then for the end of scope you're not looking at "}" but instead you're looking at _last_ machine instruction in that scope. Now, if you want to find out start and end MachineInstrs for a lexical scope (and corresponding line numbers) then se...

...etend the phis do not alias. It seems to be analyzing corresponding phi operands assuming the PHIs to be ‘Noalias’ to begin with. IMHO, this setup does not work correctly for loop header phis. From: Hiroshi Yamauchi <yamauchi at google.com> Sent: Tuesday, March 17, 2020 8:38 AM To: Chawla, Pankaj <pankaj.chawla at intel.com> Cc: llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] valid BasicAA behavior? Perhaps BasicAA is telling that A and B don't alias during one particular iteration of the loop even though they are swapped? 1: ; p...

Dear Sir, I am Pankaj Singhal from Jaipur, India. I am very much interested and strongly looking forward in getting involved in this project Learning-to-Rank. My previous experience in this field is good. Last semester I did a similar job of ranking the URLs of the given huge dataset based on their attribute values. Th...

...op has this SCEV form- {0,+,%s}<nsw><%for.body> Can someone please clarify why it is not ok to deduce the stride to be positive based on the assumption that the IV cannot have a signed underflow due to the presence of the NSW flag otherwise the program has undefined behavior? Thanks, Pankaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160629/10545176/attachment.html>

Hi All,   int global; int func( int t) {    //scope 1   {      ....   } <-----   return x; }   For the above code, i want to collect endline (indicated by <---) for the scope. Can we get this information from the Dwarf Information in llvm 2.9 ?     Thanks & Regards, Pankaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111003/a1626867/attachment.html>

...my code and I see that it works. But when I extract the variable and check the metadata information to retrieve the scope information, I do not get exact scope, after optimization. As you said that this is a work in progress, so can we expect full version on this in llvm3.3 release ?   Regards, Pankaj   ________________________________ From: Eric Christopher <echristo at gmail.com> To: Pankaj Gode <godepankaj at yahoo.com>; Adrian Prantl <aprantl at apple.com> Cc: llvm Developers <llvmdev at cs.uiuc.edu> Sent: Monday, April 29, 2013 12:24 PM Subject: Re: [LLVMdev] Low...

...an. This means that we should generate sext for signed IVs and vice-versa. I believe this is a better approach as it preserves the information directly in the IR as opposed to relying on ScalarEvolution to deduce it. Moving it to a different location can be done separately. Do you agree? Thanks, Pankaj -----Original Message----- From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] Sent: Thursday, April 13, 2017 8:35 PM To: llvm-dev at lists.llvm.org; Chawla, Pankaj Subject: Re: [llvm-dev] Question on induction variable simplification pass Hi Pankaj, On April 12, 2017 at 5:22:45 PM, Ch...

On Tue, Apr 23, 2019 at 01:36:12PM +0530, Pankaj Gupta wrote: > Dont support 'MAP_SYNC' with non-DAX files and DAX files > with asynchronous dax_device. Virtio pmem provides > asynchronous host page cache flush mechanism. We don't > support 'MAP_SYNC' with virtio pmem and xfs. > > Signed-off-by: Pankaj Gupta...