search for: palsberg

...mation about *strict* SSA form. The strict SSA form provide opportunities of optimization in register allocation, because is proved that all interference graphs of the IR in *strict* SSA form are chordal and for those, there are polynomial algorithms for the graph coloring (http://web.cs.ucla.edu/~palsberg/paper/aplas05.pdf). -- Natanael Ramos Membro do corpo discente de Ciência da Computação pelo Instituto Federal de Minas Gerais - Campus Formiga -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150903/eebb222...

...head I would name the following papers: 1)  A Generalized Algorithm for Graph-Coloring Register Allocation by Michael D. Smith, Norman Ramsey and Glenn Holloway      http://www.cs.tufts.edu/~nr/pubs/gcra-abstract.html 2) Register allocation by puzzle solving by Fernando Magno Quintão Pereira, Jens Palsberg      http://llvm.org/pubs/2008-06-PLDI-PuzzleSolving.pdf I think I've seen a few more papers on this topic, but cannot remember them at the moment. If I find more papers in my collection I'll let you know. /Roman >________________________________ >Von: Jakob Stoklund Olesen <s...

On Sep 27, 2011, at 12:11 AM, Leo Romanoff wrote: > Quite some of these register allocation proposals are also able to handle overlapping register classes. That's interesting. Do you have any references? /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110927/e4b1f13d/attachment.html>

...ance of native code generated is about the same as for linear scan, compile times are currently much longer. It's early days for this allocator though, and I'll be looking to improve on both these aspects in the coming months. (Experiments conducted by Fernando Magno Quinto Pereira and Jens Palsberg at UCLA, published in [3], using an earlier prototype of this allocator showed an average of 5% runtime speedup for the SPEC2000 benchmarks when compared to Linear Scan (under LLVM 1.9). Hopefully we can get back to that, and beyond.) So to anyone who wants to tinker, improve or help out with test...

> > What do you think about this approach? Whould it be interesting to > implement something like that for LLVM? May be you already have > considered something like that? Are there any plans to it? We have talked about whole function instruction selection but does not have immediate plan to implement it. If we were to implement it today, it would probably be done on DAGs with

...as Braun , Sebastian Buchwald , Sebastian Hack , Roland Leißa , Christoph Mallon , and Andreas Zwinkau https://www.info.uni-karlsruhe.de/uploads/publikationen/braun13cc.pdf Optimal register allocation for SSA-form programs in polynomial time Sebastian Hack, Gerhard Goos http://web.cs.ucla.edu/~palsberg/course/cs232/papers/HackGoos-ipl06.pdf A lot of the earlier literature regarding the register allocation problem describes the general graph colouring problem as NP-complete, however previous research in Register Allocation has been in the context of programs that were not in SSA form. i.e. the Ch...

Hi, LLVM already uses dynamic-programming based optimal pattern matching selectors for some of the target architectures. But as far as I know, the code is first converted out of the SSA form, before the selection process takes place. The same approach is used by many other compilers. But there is an article from Erik Eckstein, where a different method is proposed. In the described approach, the

Hi Matthias, Thanks for your hint! It is just for learning and practicing for me, just like migrate DragonEgg http://lists.llvm.org/pipermail/llvm-dev/2017-September/117201.html the motivating is for learning from GCC and LLVM developers. 在 2017年12月19日 10:07, Matthias Braun 写道: > > >> On Dec 18, 2017, at 9:52 AM, Leslie Zhai via llvm-dev >> <llvm-dev at lists.llvm.org

...language scoping rules you > mentioned. Would you mind telling me about that? Thank you very > much. > > Seung Jae Lee it seems you target some sort of VM. Your target architecture has some similarities to the relatively unknown ZIL that is mentioned in this paper: Mayur Naik and Jens Palsberg. Compiling with code-size constraints <http://www.cs.ucla.edu/%7Epalsberg/paper/tecs04.pdf>. /ACM Transactions on Embedded Computing Systems/, 3(1):163-181, 2004. And possibly to other (open-sourced) VMs as well. Another example is the "old" SimpleSUIF code generator that emits thre...