search for: pair_gpr

Displaying 5 results from an estimated 5 matches for "pair_gpr".

2009 Feb 20
2
[LLVMdev] help: about how to use tblgen to constraint operand.
...opers Mailing List" <llvmdev at cs.uiuc.edu> 日期: 2009,220,周五,1:11上午 Currently there is no constraint that tells the register allocator to allocate a consecutive register pair. What I would suggest you do is to declare pseudo register pair registers (and corresponding register class, say PAIR_GPR). In this case, your myFMDRR would take one input of PAIR_GPR class. The asm printer should be taught to print a PAIR_GPR register as two GPR registers (you should also teach the JIT of the same thing). A PAIR_GPR register should be a super register of two GPR registers. e.g. r0r1_pair is a super...
2009 Feb 20
0
[LLVMdev] help: about how to use tblgen to constraint operand.
....ui > uc.edu> > 日期: 2009,220,周五,1:11上午 > > Currently there is no constraint that tells the register allocator > to allocate a consecutive register pair. What I would suggest you do > is to declare pseudo register pair registers (and corresponding > register class, say PAIR_GPR). In this case, your myFMDRR would take > one input of PAIR_GPR class. The asm printer should be taught to > print a PAIR_GPR register as two GPR registers (you should also > teach the JIT of the same thing). > > A PAIR_GPR register should be a super register of two GPR registe...
2009 Feb 19
1
[LLVMdev] help: about how to use tblgen to constraint operand.
I define a pattern to move two 32bits gpr to 64bits fpr. like arm instructure fmdrr. But I need to use an even/odd register pair to save its 2 operands. I define in mytarget.td: myfmdrr: SDTypeProfile<1, 2, [SDTCisVT<0, f64>, SDTCisVT<1, i32>,     SDTCisSameAs<1, 2>]>; def my_fmdrr : ........... def myFMDRR : ....                       (outs FPR: $result), ins(GPR:
2009 Mar 30
1
[LLVMdev] Dear Evan Chang, Re: help: about how to use tblgen to constraint operand.
...opers Mailing List" <llvmdev at cs.uiuc.edu> 日期: 2009,220,周五,1:11上午 Currently there is no constraint that tells the register allocator to allocate a consecutive register pair. What I would suggest you do is to declare pseudo register pair registers (and corresponding register class, say PAIR_GPR). In this case, your myFMDRR would take one input of PAIR_GPR class. The asm printer should be taught to print a PAIR_GPR register as two GPR registers (you should also teach the JIT of the same thing). A PAIR_GPR register should be a super register of two GPR registers. e.g. r0r1_pair is a super...
2009 Mar 31
1
[LLVMdev] 转发: Re: Dear Evan Chang, Re: help: about how to use tblgen to constraint operand.
...opers Mailing List" <llvmdev at cs.uiuc.edu> 日期: 2009,220,周五,1:11上午 Currently there is no constraint that tells the register allocator to allocate a consecutive register pair. What I would suggest you do is to declare pseudo register pair registers (and corresponding register class, say PAIR_GPR). In this case, your myFMDRR would take one input of PAIR_GPR class. The asm printer should be taught to print a PAIR_GPR register as two GPR registers (you should also teach the JIT of the same thing). A PAIR_GPR register should be a super register of two GPR registers. e.g. r0r1_pair is a super...