search for: pagetable_get_mfn

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In sh_page_fault(), there are some code like following, why we think it is mmio only when paging_vcpu_mode_translate(v)? Thanks Yunhong Jiang /* What mfn is the guest trying to access? */ gfn = guest_l1e_get_gfn(gw.eff_l1e); gmfn = vcpu_gfn_to_mfn(v, gfn); mmio = (is_hvm_domain(d) && paging_vcpu_mode_translate(v) &&

...ot;, current->domain->domain_id, current->vcpu_id, v->domain->domain_id, v->vcpu_id); - domain_crash(v->domain); - return; } old_mfn = pagetable_get_mfn(v->arch.monitor_table); @@ -2590,7 +2588,8 @@ static void sh_update_paging_modes(struc * pull it down! Switch CR3, and warn the HVM code that * its host cr3 has changed. */ make_cr3(v, mfn_x(new_mfn)); - write_ptbase(v); +...

2011/7/19 Stefano Stabellini <stefano.stabellini@eu.citrix.com>: > CC''ing Tim and xen-devel > > On Mon, 18 Jul 2011, Jiageng Yu wrote: >> 2011/7/16 Stefano Stabellini <stefano.stabellini@eu.citrix.com>: >> > On Fri, 15 Jul 2011, Jiageng Yu wrote: >> >> 2011/7/15 Jiageng Yu <yujiageng734@gmail.com>: >> >> > 2011/7/15

Populate-on-demand: Check pages being returned by the balloon driver This patch series is the second result of my work last summer on decreasing fragmentation of superpages in a guests'' p2m when using populate-on-demand. This patch series is against 4.1; I''m posting it to get feedback on the viability of getting a ported version of this patch into 4.2. As with the previous

This patch series tidies up a few bits ofthe nested p2m code. The main thing it does is reorganize the locking so that most of the changes to nested p2m tables happen only under the p2m lock, and the nestedp2m lock is only needed to reassign p2m tables to new cr3 values. Changes since v1: - a few minor fixes - more sensible flushing policy in p2m_get_nestedp2m() - smoke-tested this time!

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):