Displaying 7 results from an estimated 7 matches for "paddsw".
2005 Jul 20
1
MMX IDCT for theora-exp
...t; \
+ " paddw " r1","r2"\n" \
+ " movq " J(7)","r1"\n" \
+ " paddw " r5","r7"\n" \
+ " movq " r0","r5"\n" \
+ " pmulhw " r3","r0"\n" \
+ " paddsw " r7","r4"\n" \
+ " pmulhw " r1","r5"\n" \
+ " movq " C(7)","r7"\n" \
+ " psubsw " r2","r6"\n" \
+ " paddw " r3","r0"\n" \
+ " pmulhw " r7&q...
2005 Mar 23
3
[PATCH] promised MMX patches rc1
...0x0080008000800080 */
+" movq (%1), %%mm2 \n\t" /* First four input values */
+" movq %%mm0, %%mm1 \n\t" /* Set mm1 == mm0 */
+" movq 8(%1), %%mm3 \n\t" /* Next four input values */
+" decl %%ecx \n\t" /* dec counter */
+" paddsw %%mm3, %%mm1 \n\t" /* add+128 and saturate to 16bit */
+" lea 0x10(%1), %1 \n\t" /*_residuo+16 */
+" paddsw %%mm2, %%mm0 \n\t" /* add+128 and saturate to 16bit */
+" packuswb %%mm1, %%mm0 \n\t" /* pack saturate with next(high) four values *...
2005 Mar 23
0
[PATCH]
...0x0080008000800080 */
+" movq (%1), %%mm2 \n\t" /* First four input values */
+" movq %%mm0, %%mm1 \n\t" /* Set mm1 == mm0 */
+" movq 8(%1), %%mm3 \n\t" /* Next four input values */
+" decl %%ecx \n\t" /* dec counter */
+" paddsw %%mm3, %%mm1 \n\t" /* add+128 and saturate to 16bit */
+" lea 0x10(%1), %1 \n\t" /*_residuo+16 */
+" paddsw %%mm2, %%mm0 \n\t" /* add+128 and saturate to 16bit */
+" packuswb %%mm1, %%mm0 \n\t" /* pack saturate with next(high) four values *...
2004 Aug 24
5
MMX/mmxext optimisations
quite some speed improvement indeed.
attached the updated patch to apply to svn/trunk.
j
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2006 May 25
2
Compilation issues with s390
Hi all,
I'm trying to compile asterisk on the mainframe (s390 / s390x) and I am
running into issues. I was wondering if somebody could give a hand?
I'm thinking that I should be able to do this. I have noticed that Debian
even has binary RPM's out for Asterisk now. I'm trying to do this on SuSE
SLES8 (with the 2.4 kernel).
What I see is, an issue that arch=s390 isn't
2011 Jun 17
0
[LLVMdev] RFC: Integer saturation intrinsics
...#39;t work. A portable saturating
>> add/subtract intrinsic might be nice given that most vector
>> instruction sets have such an instruction, but this seems completely
>> orthogonal.
>
> Can you explain why you think the pattern (which?) would not work?
Suppose you want a paddsw. To express the equivalent using ssat, you
would have to write (trunc (ssat (add (sext x), (sext y)), c)). And I
wouldn't trust that to work.
>>
>>> The plan is to form calls to these intrinsics in InstCombine. Legalizer can expand these intrinsics if they are not legal. The e...
2011 Jun 17
2
[LLVMdev] RFC: Integer saturation intrinsics
On Jun 17, 2011, at 3:42 PM, Eli Friedman wrote:
> On Fri, Jun 17, 2011 at 3:08 PM, Evan Cheng <evan.cheng at apple.com> wrote:
>> Hi all,
>>
>> I'm proposing integer saturation intrinsics.
>>
>> def int_ssat : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, llvm_i32_ty]>;
>> def int_usat : Intrinsic<[llvm_anyint_ty],