search for: p_temp

...C. >From the R internals documentation, I read that: "The sxpinfo header is defined as a 32-bit C structure..." and "A SEXPREC is a C structure containing the 32-bit header..." The question is: does the INTSXP allow vectors larger than 32-bit? A test example: //### int *p_temp; SEXP root = PROTECT(allocVector(VECSXP, 5)); long long int verylargeinteger; // something to compute verylargeinteger, > 32-bit SEXP temp = SET_VECTOR_ELT(root, 0, allocVector(INTSXP, verylargeinteger)); p_temp = INTEGER(temp); //### "temp" should be a vector of length > 32-bit...

...d_fp_attrib(struct nv50_pc *pc, int i, int *mid, int *aid, int *p_oid) { struct nv50_reg *iv; int oid, c, n; @@ -1997,15 +1983,11 @@ load_fp_attrib(struct nv50_pc *pc, int i, unsigned *acc, int *mid, for (c = 0, n = i * 4; c < 4; c++, n++) { oid = (*p_oid)++; - pc->attr[n].type = P_TEMP; - pc->attr[n].index = i; - if (pc->attr[n].acc == acc[n]) + if (!pc->attr[n].acc) continue; mask |= (1 << c); - pc->attr[n].acc = acc[n]; - pc->attr[n].rhw = pc->attr[n].hw = -1; alloc_reg(pc, &pc->attr[n]); pc->attr[n].rhw = (*aid)++; @@ -...

...else + ++nr_dst; + } else dst[c] = NULL; rdst[c] = NULL; src[0][c] = NULL; @@ -1313,8 +1315,13 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) src[2][c] = NULL; } + pp_rtmp = &dst[ffs(mask) - 1]; + if (*pp_rtmp && (*pp_rtmp)->type != P_TEMP && (nr_dst > 1 || sat)) + pp_rtmp = &temp; + for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i]; + const struct tgsi_full_src_register *fs = + &inst->FullSrcRegisters[i]; if (fs-&...

...ce a way to negate args for ops that - * support it. - * - * Look into inlining IMMD for ops other than MOV (make it general?) + * Look into inlining IMMD for ops other than MOV (make it general ?) * - Maybe even relax restrictions a bit, can't do P_RESULT + P_IMMD, - * but can emit to P_TEMP first - then MOV later. NVIDIA does this + * but can emit to P_TEMP first - then MOV later. NVIDIA does this. * * In ops such as ADD it's possible to construct a bad opcode in the !is_long() * case, if the emit_src() causes the inst to suddenly become long. * - * Verify half-insns wo...

...nv50_program_exec *e = exec(pc); - unsigned inv_cop[8] = { 0, 4, 2, 6, 1, 5, 3, 7 }; struct nv50_reg *rdst; - assert(c_op <= 7); + assert(ccode < 16); if (check_swap_src_0_1(pc, &src0, &src1)) - c_op = inv_cop[c_op]; + ccode = ccode ^ 0x7; rdst = dst; - if (dst->type != P_TEMP) + if (dst && dst->type != P_TEMP) dst = alloc_temp(pc, NULL); /* set.u32 */ set_long(pc, e); e->inst[0] |= 0xb0000000; - e->inst[1] |= (3 << 29); - e->inst[1] |= (c_op << 14); - /*XXX: breaks things, .u32 by default? - * decuda will disasm as .u16 an...

...struct nv50_reg *src1) { struct nv50_program_exec *e = exec(pc); - unsigned inv_cop[8] = { 0, 4, 2, 6, 1, 5, 3, 7 }; struct nv50_reg *rdst; - assert(c_op <= 7); if (check_swap_src_0_1(pc, &src0, &src1)) - c_op = inv_cop[c_op]; + c_op += 8; rdst = dst; - if (dst->type != P_TEMP) - dst = alloc_temp(pc, NULL); + if (dst && dst->type != P_TEMP) + dst = temp_temp(pc); /* set.u32 */ set_long(pc, e); e->inst[0] |= 0xb0000000; - e->inst[1] |= (3 << 29); - e->inst[1] |= (c_op << 14); - /*XXX: breaks things, .u32 by default? - * decud...

Hi ! I've been trying to improve NV50 shader generation a bit the last couple of weeks, so here is what I've produced. I don't know if it's usable for you or just a pile of horrible hacks, but at least it makes some mesa demos render more correcly, p.e. the teapot (aside from mip-mapping issues of the floor texture), arbfplight, and I think the gears also didn't appear as they

...3 +1905,14 @@ static unsigned prep_fp_attrib(struct nv50_pc *pc, int i, unsigned *acc, int *p_mid, int *aid, int *p_oid) { - int c, n, oid = *p_oid, mid = *p_mid; + int c, n, oid, mid = *p_mid; unsigned mask = 0; for (c = 0, n = i * 4; c < 4; c++, n++) { pc->attr[n].type = P_TEMP; pc->attr[n].hw = -1; pc->attr[n].index = i; + oid = (*p_oid)++; if (pc->attr[n].acc == acc[n]) continue; @@ -1915,13 +1921,12 @@ prep_fp_attrib(struct nv50_pc *pc, int i, unsigned *acc, int *p_mid, pc->attr[n].acc = acc[n]; pc->attr[n].rhw = (*aid)++; - pc-&...

Hi all, first post. I have a simple set of drag/drops that I''m trying to use in FF. Unfortunately on page load all of the droppables on the page fire simultaneously and then won''t respond to any futher attempts to drop anything on them. Firebug isn''t showing any errors and I''m completely stumped... Any ideas of where to look? using:

...'t call this function for these ops */ + assert(0); + break; default: - return TRUE; + /* linear vector instruction */ + return (1 << c); } } @@ -1393,25 +1432,6 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) rdst[c] = dst[c]; dst[c] = temp_temp(pc); } - } else - if (direct2dest_op(inst)) { - for (c = 0; c < 4; c++) { - if (!dst[c] || dst[c]->type != P_TEMP) - continue; - - for (i = c + 1; i < 4; i++) { - if (dst[c] == src[0][i] || - dst[c] == src[1][i] || - dst[c] == src[2][i]) - break; - } - i...

...ase PIPE_SHADER_VERTEX: + p->cfg.clpd = 0x40; + p->cfg.io_nr = pc->result_nr; break; case PIPE_SHADER_FRAGMENT: - p->cfg.fp.regs[0] = 0x01000404; - p->cfg.fp.regs[1] = 0x00000400; - - p->cfg.fp.map[0] = 0x03020100; - p->cfg.fp.high_map = 1; - rtype[0] = rtype[1] = P_TEMP; + p->cfg.regs[0] = 0x01000404; + p->cfg.io_nr = pc->attr_nr; + if (p->info.writes_z) { - p->cfg.fp.regs[2] |= 0x00000100; - p->cfg.fp.regs[3] |= 0x00000011; + p->cfg.regs[2] |= 0x00000100; + p->cfg.regs[3] |= 0x00000011; } if (p->info.uses_kill) -...