Displaying 1 result from an estimated 1 matches for "p_256b_store_dword".
2017 Aug 26
2
Error in generating Object Code for implemented assembly vector instructions
i want to emit binary code for the following implemented vector assembly
instructions.
P_256B_LOAD_DWORD R_0_R2048b_0, pword ptr [rip + b]
P_256B_LOAD_DWORD R_0_R2048b_1, pword ptr [rip + c]
P_256B_VADD R_0_R2048b_0, R_0_R2048b_1, R_0_R2048b_0
P_256B_STORE_DWORD pword ptr [rip + a], R_0_R2048b_0
I added the following lines in X86MCInstLower.cpp;
unsigned NewOpc;
switch (OutMI.getOpcode()) {
default: llvm_unreachable("Invalid opcode");
case X86::P_256B_LOAD_DWORD: NewOpc = X86::P_256B_LOAD_DWORD;
break;
case X86::P_256...