Displaying 2 results from an estimated 2 matches for "p5600alq".
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p5600agq
2014 Jan 28
3
[LLVMdev] New machine model questions
...edule. If it's important to be this precise, then I suggest you plugin a new MachineSchedStrategy where you can model stalls for any special cases during scheduling.
You need a super-resource:
def P5600A : ProcResource<2>;
def P5600AGQ : ProcResource<1> { let Super = P5600A; }
def P5600ALQ : ProcResource<1> { let Super = P5600A; }
I'll take a look at MachineSchedStrategy. I don't know how important that precision is likely to be at the moment but I've generally found that the more accurate the machine description is, the harder it is to find one of the bad cases. T...
2014 Jan 24
2
[LLVMdev] New machine model questions
Hi Andrew,
I seem to be making good progress on the P5600 scheduler using the new machine model but I've got a few questions about it.
How would you represent an instruction that splits into two micro-ops and is dispatched to two different reservation stations?
For example, I have two reservation stations (AGQ and FPQ). An FPU load instruction is split into a load micro-op which is