Displaying 5 results from an estimated 5 matches for "p2m_set_entry".
2009 Jan 22
8
[PATCH 2/2] Enhance MTRR/PAT virtualization for EPT & VT-d enabled both
The patch attached is to set effective memory type for EPT according to the VT-d snoop control capability, and also includes some cleansup for EPT & VT-d both enabled.
Signed-off-by: Zhai, Edwin Edwin.Zhai@intel.com<mailto:Edwin.Zhai@intel.com>
Signed-off-by: Xin, Xiaohui xiaohui.xin@intel.com<mailto:xiaohui.xin@intel.com>
_______________________________________________
2008 May 09
14
[PATCH] patch to support super page (2M) with EPT
...cept the first 2M
and the last 2M.
The first 2M covers special memory, and Xen use the last few pages in
guest memory to do special things.
We let them to be 4K pages as normal.
super_page_common.patch
To modify the p2m interfaces by adding an order parameter, such as
guest_physmap_add_page(), p2m_set_entry(), etc.
p2m-ept-file.patch
To handle the EPT tables to support super page.
Signed-off-by: Xin Xiaohui <xiaohui.xin@intel.com>
Signed-off-by: Li Xin, B <xin.b.li@intel.com>
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Xen-devel mailing...
2011 Mar 25
2
[RFC PATCH 2/3] AMD IOMMU: Implement p2m sharing
--
Advanced Micro Devices GmbH
Sitz: Dornach, Gemeinde Aschheim,
Landkreis München Registergericht München,
HRB Nr. 43632
WEEE-Reg-Nr: DE 12919551
Geschäftsführer:
Alberto Bozzo, Andrew Bowd
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2012 Mar 01
14
[PATCH 0 of 3] RFC Paging support for AMD NPT V2
There has been some progress, but still no joy. Definitely not intended for
inclusion at this point.
Tim, Wei, I added a Xen command line toggle to disable IOMMU and P2M table
sharing.
Tim, I verified that changes to p2m-pt.c don''t break shadow mode (64bit
hypervisor and Win 7 guest).
Hongkaixing, I incorporated your suggestion in patch 2, so I should add your
Signed-off-by eventually.
2013 Dec 06
36
[V6 PATCH 0/7]: PVH dom0....
Hi,
V6: The only change from V5 is in patch #6:
- changed comment to reflect autoxlate
- removed a redundant ASSERT
- reworked logic a bit so that get_page_from_gfn() is called with NULL
for p2m type as before. arm has ASSERT wanting it to be NULL.
Tim: patch 4 needs your approval.
Daniel: patch 5 needs your approval.
These patches implement PVH dom0.
Patches 1 and 2