search for: p0l2

Displaying 14 results from an estimated 14 matches for "p0l2".

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2019 Nov 21
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...Basically the difference is that when Windows 7 or Linux (the _REV==5 check) then we directly do link disable whereas in Windows 8+ we invoke LKDS() method that puts the link into L2/L3. None of the fields they access seem to touch the GPU itself. LKDS() for the first PEG port looks like this: P0L2 = One Sleep (0x10) Local0 = Zero While (P0L2) { If ((Local0 > 0x04)) { Break } Sleep (0x10) Local0++ } One thing that comes to mind is that the loop can end even if P0L2 is not cleared as it does only 5 iterations with 16 ms sleep between. Maybe Sleep() is implemented...
2019 Nov 21
5
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
On Thu, Nov 21, 2019 at 12:34:22PM +0100, Rafael J. Wysocki wrote: > On Thu, Nov 21, 2019 at 12:28 PM Mika Westerberg > <mika.westerberg at intel.com> wrote: > > > > On Wed, Nov 20, 2019 at 11:29:33PM +0100, Rafael J. Wysocki wrote: > > > > last week or so I found systems where the GPU was under the "PCI > > > > Express Root Port" (name
2019 Nov 21
3
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...L2/L3 Ready is expected to be transient, so finally power should > be removed somehow. There is GPIO for both power and PERST, I think the line here: \_SB.SGOV (0x01010004, Zero) is the one that removes power. > > LKDS() for the first PEG port looks like this: > > > > P0L2 = One > > Sleep (0x10) > > Local0 = Zero > > While (P0L2) > > { > > If ((Local0 > 0x04)) > > { > > Break > > } > > > > Sleep (0x10) > > Local0++ > > } > &...
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...when Windows 7 or Linux (the _REV==5 > check) then we directly do link disable whereas in Windows 8+ we invoke > LKDS() method that puts the link into L2/L3. None of the fields they > access seem to touch the GPU itself. > > LKDS() for the first PEG port looks like this: > > P0L2 = One > Sleep (0x10) > Local0 = Zero > While (P0L2) > { > If ((Local0 > 0x04)) > { > Break > } > > Sleep (0x10) > Local0++ > } > > One thing that comes to mind is that the loop can end ev...
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...nt into PCI D[1-3] is expected to put the link into L1, so I'm not sure how that plays with the later attempt to put it into L2/L3 Ready. Also, L2/L3 Ready is expected to be transient, so finally power should be removed somehow. > LKDS() for the first PEG port looks like this: > > P0L2 = One > Sleep (0x10) > Local0 = Zero > While (P0L2) > { > If ((Local0 > 0x04)) > { > Break > } > > Sleep (0x10) > Local0++ > } > > One thing that comes to mind is that the loop can end ev...
2019 Nov 21
2
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...; > There is GPIO for both power and PERST, I think the line here: > > > > \_SB.SGOV (0x01010004, Zero) > > > > is the one that removes power. > > OK > > > > > LKDS() for the first PEG port looks like this: > > > > > > > > P0L2 = One > > > > Sleep (0x10) > > > > Local0 = Zero > > > > While (P0L2) > > > > { > > > > If ((Local0 > 0x04)) > > > > { > > > > Break > > > > } > >...
2019 Nov 22
3
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...> There is GPIO for both power and PERST, I think the line here: > > > > \_SB.SGOV (0x01010004, Zero) > > > > is the one that removes power. > > OK > > > > > LKDS() for the first PEG port looks like this: > > > > > > > > P0L2 = One > > > > Sleep (0x10) > > > > Local0 = Zero > > > > While (P0L2) > > > > { > > > > If ((Local0 > 0x04)) > > > > { > > > > Break > > > > } > >...
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...y power should > > be removed somehow. > > There is GPIO for both power and PERST, I think the line here: > > \_SB.SGOV (0x01010004, Zero) > > is the one that removes power. OK > > > LKDS() for the first PEG port looks like this: > > > > > > P0L2 = One > > > Sleep (0x10) > > > Local0 = Zero > > > While (P0L2) > > > { > > > If ((Local0 > 0x04)) > > > { > > > Break > > > } > > > > > > Sleep (0x10...
2019 Nov 22
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...hink the line here: > > > > > > \_SB.SGOV (0x01010004, Zero) > > > > > > is the one that removes power. > > > > OK > > > > > > > LKDS() for the first PEG port looks like this: > > > > > > > > > > P0L2 = One > > > > > Sleep (0x10) > > > > > Local0 = Zero > > > > > While (P0L2) > > > > > { > > > > > If ((Local0 > 0x04)) > > > > > { > > > > > Break >...
2019 Nov 22
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...hink the line here: > > > > > > \_SB.SGOV (0x01010004, Zero) > > > > > > is the one that removes power. > > > > OK > > > > > > > LKDS() for the first PEG port looks like this: > > > > > > > > > > P0L2 = One > > > > > Sleep (0x10) > > > > > Local0 = Zero > > > > > While (P0L2) > > > > > { > > > > > If ((Local0 > 0x04)) > > > > > { > > > > > Break >...
2019 Nov 22
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...> > \_SB.SGOV (0x01010004, Zero) > > > > > > > > is the one that removes power. > > > > > > OK > > > > > > > > > LKDS() for the first PEG port looks like this: > > > > > > > > > > > > P0L2 = One > > > > > > Sleep (0x10) > > > > > > Local0 = Zero > > > > > > While (P0L2) > > > > > > { > > > > > > If ((Local0 > 0x04)) > > > > > > { > > > &g...
2019 Nov 22
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...> > \_SB.SGOV (0x01010004, Zero) > > > > > > > > is the one that removes power. > > > > > > OK > > > > > > > > > LKDS() for the first PEG port looks like this: > > > > > > > > > > > > P0L2 = One > > > > > > Sleep (0x10) > > > > > > Local0 = Zero > > > > > > While (P0L2) > > > > > > { > > > > > > If ((Local0 > 0x04)) > > > > > > { > > > &g...
2019 Oct 22
0
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...s the fallback to some older method of runtime suspending the device, and I think it will end up touching different registers on the bridge controller which do not show the broken behaviour. You'll find references to following variables which all cause a link to be powered down: Q0L2 (newest), P0L2, P0LD (oldest, I think). Maybe I remember incorrectly and have to read the code again... okay, the fallback path uses P0LD indeed. That's actually the only register of those being documented by Intel afaik. > If I read it right, the later condition tries to detect Linux which > fails no...
2019 Oct 22
2
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
On Tue, Oct 22, 2019 at 11:16:14AM +0200, Karol Herbst wrote: > I think there is something I totally forgot about: > > When there was never a driver bound to the GPU, and if runtime power > management gets enabled on that device, runtime suspend/resume works > as expected (I am not 100% sure on if that always works, but I will > recheck that). AFAIK, if there is no driver bound