search for: ovly

...rivers/gpu/drm/nouveau/dispnv50/head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c index 2e7a0c347ddb..adce62f4e18f 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -413,6 +413,7 @@ nv50_head_atomic_duplicate_state(struct drm_crtc *crtc) asyh->ovly = armh->ovly; asyh->dither = armh->dither; asyh->procamp = armh->procamp; + asyh->or = armh->or; asyh->dp = armh->dp; asyh->clr.mask = 0; asyh->set.mask = 0; -- 2.17.1

...n't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp. Signed-off-by: Sandy Huang <hjc at rock-chips.com> --- drivers/gpu/drm/nouveau/dispnv04/crtc.c | 7 ++++--- drivers/gpu/drm/nouveau/dispnv50/base507c.c | 4 ++-- drivers/gpu/drm/nouveau/dispnv50/ovly507e.c | 2 +- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c index f22f010..59d2f07 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c +++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c @@ -874,11 +874,12...

.../head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c > index 2e7a0c347ddb..adce62f4e18f 100644 > --- a/drivers/gpu/drm/nouveau/dispnv50/head.c > +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c > @@ -413,6 +413,7 @@ nv50_head_atomic_duplicate_state(struct drm_crtc *crtc) > asyh->ovly = armh->ovly; > asyh->dither = armh->dither; > asyh->procamp = armh->procamp; > + asyh->or = armh->or; > asyh->dp = armh->dp; > asyh->clr.mask = 0; > asyh->set.mask = 0; > -- > 2.17.1 > > __...

...vers/gpu/drm/nouveau/dispnv50/head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c index 8efb778a3b207..06ee23823a689 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -413,6 +413,7 @@ nv50_head_atomic_duplicate_state(struct drm_crtc *crtc) asyh->ovly = armh->ovly; asyh->dither = armh->dither; asyh->procamp = armh->procamp; + asyh->or = armh->or; asyh->dp = armh->dp; asyh->clr.mask = 0; asyh->set.mask = 0; -- 2.20.1

...nv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -507,20 +507,28 @@ nv50_head_create(struct drm_device *dev, int index) if (disp->disp->object.oclass < GV100_DISP) { ret = nv50_base_new(drm, head->base.index, &base); + if (ret) + goto fail_free; + ret = nv50_ovly_new(drm, head->base.index, &ovly); + if (ret) + goto fail_free; } else { ret = nv50_wndw_new(drm, DRM_PLANE_TYPE_PRIMARY, head->base.index * 2 + 0, &base); + if (ret) + goto fail_free; + ret = nv50_wndw_new(drm, DRM_PLANE_TYPE_OVERLAY, head->base.ind...

...nv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -507,20 +507,28 @@ nv50_head_create(struct drm_device *dev, int index) if (disp->disp->object.oclass < GV100_DISP) { ret = nv50_base_new(drm, head->base.index, &base); + if (ret) + goto fail_free; + ret = nv50_ovly_new(drm, head->base.index, &ovly); + if (ret) + goto fail_free; } else { ret = nv50_wndw_new(drm, DRM_PLANE_TYPE_PRIMARY, head->base.index * 2 + 0, &base); + if (ret) + goto fail_free; + ret = nv50_wndw_new(drm, DRM_PLANE_TYPE_OVERLAY, head->base.ind...

...nv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -507,20 +507,28 @@ nv50_head_create(struct drm_device *dev, int index) if (disp->disp->object.oclass < GV100_DISP) { ret = nv50_base_new(drm, head->base.index, &base); + if (ret) + goto fail_free; + ret = nv50_ovly_new(drm, head->base.index, &ovly); + if (ret) + goto fail_free; } else { ret = nv50_wndw_new(drm, DRM_PLANE_TYPE_PRIMARY, head->base.index * 2 + 0, &base); + if (ret) + goto fail_free; + ret = nv50_wndw_new(drm, DRM_PLANE_TYPE_OVERLAY, head->base.ind...

...rmat correctly, > So we use bpp[BitPerPlane] to instead cpp. > > Signed-off-by: Sandy Huang <hjc at rock-chips.com> > --- > drivers/gpu/drm/nouveau/dispnv04/crtc.c | 7 ++++--- > drivers/gpu/drm/nouveau/dispnv50/base507c.c | 4 ++-- > drivers/gpu/drm/nouveau/dispnv50/ovly507e.c | 2 +- > 3 files changed, 7 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c > index f22f010..59d2f07 100644 > --- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c > +++ b/drivers/gpu/drm/nouveau/dispn...

...rivers/gpu/drm/nouveau/dispnv50/head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c index ac97ebce5b35..2e7a0c347ddb 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -413,6 +413,7 @@ nv50_head_atomic_duplicate_state(struct drm_crtc *crtc) asyh->ovly = armh->ovly; asyh->dither = armh->dither; asyh->procamp = armh->procamp; + asyh->dp = armh->dp; asyh->clr.mask = 0; asyh->set.mask = 0; return &asyh->state; -- 2.20.1

...tted * Get these patches and TegraDRM patches committed * Integrate final drm_fourcc.h to Mesa patches and get Mesa patches committed Does that sound right to you? Thanks, -James > Thanks, > Ben. > >> >> James Jones (3): >> drm/nouveau: Add format mod prop to base/ovly/nvdisp >> drm/nouveau: Check framebuffer size against bo >> drm/nouveau: Support NVIDIA format modifiers >> >> drivers/gpu/drm/nouveau/dispnv50/base507c.c | 7 +- >> drivers/gpu/drm/nouveau/dispnv50/disp.c | 59 ++++++++ >> drivers/gpu/drm/nouvea...

...ers/gpu/drm/nouveau/dispnv50/curs.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/curs507a.c | 5 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 17 +-- drivers/gpu/drm/nouveau/dispnv50/oimm.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/oimm507b.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/ovly.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/ovly507e.c | 5 +- drivers/gpu/drm/nouveau/dispnv50/wimm.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c | 5 +- drivers/gpu/d...

.../nouveau/dispnv50/head.c > > index 2e7a0c347ddb..adce62f4e18f 100644 > > --- a/drivers/gpu/drm/nouveau/dispnv50/head.c > > +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c > > @@ -413,6 +413,7 @@ nv50_head_atomic_duplicate_state(struct drm_crtc *crtc) > > asyh->ovly = armh->ovly; > > asyh->dither = armh->dither; > > asyh->procamp = armh->procamp; > > + asyh->or = armh->or; > > asyh->dp = armh->dp; > > asyh->clr.mask = 0; > > asyh->set.mask = 0; &g...

...m/nouveau/kms/nv50: separate out mode commit") 52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst mode") 698c1aa9f83b ("drm/nouveau/kms/nv50-: Don't create MSTMs for eDP connectors") 6bbab3b6b656 ("drm/nouveau/kms/nv50: separate out base/ovly channel usage bounds commit") a7ae1561909d ("drm/nouveau/kms/nv50: separate out lut commit") ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface commit") f4778f08a038 ("drm/nouveau/kms/nv50: fix handling of gamma since atomic conversion") v...

...drm_atomic_state state; @@ -115,9 +118,12 @@ struct nv50_head_atom { u8 nhsync:1; u8 nvsync:1; u8 depth:4; + u8 crc_raster:2; u8 bpc; } or; + struct nv50_crc_atom crc; + /* Currently only used for MST */ struct { int pbn; @@ -135,6 +141,7 @@ struct nv50_head_atom { bool ovly:1; bool dither:1; bool procamp:1; + bool crc:1; bool or:1; }; u16 mask; @@ -150,6 +157,19 @@ nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc) return nv50_head_atom(statec); } +static inline struct drm_encoder * +nv50_head_atom_get_encoder(struct nv5...

...drm_atomic_state state; @@ -115,9 +118,12 @@ struct nv50_head_atom { u8 nhsync:1; u8 nvsync:1; u8 depth:4; + u8 crc_raster:2; u8 bpc; } or; + struct nv50_crc_atom crc; + /* Currently only used for MST */ struct { int pbn; @@ -135,6 +141,7 @@ struct nv50_head_atom { bool ovly:1; bool dither:1; bool procamp:1; + bool crc:1; bool or:1; }; u16 mask; @@ -150,6 +157,19 @@ nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc) return nv50_head_atom(statec); } +static inline struct drm_encoder * +nv50_head_atom_get_encoder(struct nv5...

...drm_atomic_state state; @@ -115,9 +118,12 @@ struct nv50_head_atom { u8 nhsync:1; u8 nvsync:1; u8 depth:4; + u8 crc_raster:2; u8 bpc; } or; + struct nv50_crc_atom crc; + /* Currently only used for MST */ struct { int pbn; @@ -135,6 +141,7 @@ struct nv50_head_atom { bool ovly:1; bool dither:1; bool procamp:1; + bool crc:1; bool or:1; }; u16 mask; @@ -150,6 +157,19 @@ nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc) return nv50_head_atom(statec); } +static inline struct drm_encoder * +nv50_head_atom_get_encoder(struct nv5...

...drm_atomic_state state; @@ -115,9 +118,12 @@ struct nv50_head_atom { u8 nhsync:1; u8 nvsync:1; u8 depth:4; + u8 crc_raster:2; u8 bpc; } or; + struct nv50_crc_atom crc; + /* Currently only used for MST */ struct { int pbn; @@ -135,6 +141,7 @@ struct nv50_head_atom { bool ovly:1; bool dither:1; bool procamp:1; + bool crc:1; bool or:1; }; u16 mask; @@ -150,6 +157,19 @@ nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc) return nv50_head_atom(statec); } +static inline struct drm_encoder * +nv50_head_atom_get_encoder(struct nv5...

Nvidia released some documentation on how CRC support works on their GPUs, hooray! So: this patch series implements said CRC support in nouveau, along with adding some special debugfs interfaces for some relevant igt-gpu-tools tests that we'll be sending in just a short bit. This additionally adds a feature that Ville Syrj?l? came up with: vblank works. Basically, this is just a generic DRM

...or issue I mentioned on one of the patches dealt with. I'll hold off merging anything until I get the go-ahead that the modifier definitions are definitely set in stone / userspace is ready for inclusion. Thanks, Ben. > > James Jones (3): > drm/nouveau: Add format mod prop to base/ovly/nvdisp > drm/nouveau: Check framebuffer size against bo > drm/nouveau: Support NVIDIA format modifiers > > drivers/gpu/drm/nouveau/dispnv50/base507c.c | 7 +- > drivers/gpu/drm/nouveau/dispnv50/disp.c | 59 ++++++++ > drivers/gpu/drm/nouveau/dispnv50/disp.h | 4 +...

Nvidia released some documentation on how CRC support works on their GPUs, hooray! So: this patch series implements said CRC support in nouveau, along with adding some special debugfs interfaces for some relevant igt-gpu-tools tests that we'll be sending in just a short bit. This additionally adds a feature that Ville Syrj?l? came up with: vblank works. Basically, this is just a generic DRM