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On Tuesday 05 May 2009 01:02, Evan Cheng wrote: > I think it makes sense for isel to use HW cost (instruction latency, > code size) as a late tie breaker. In that case, shouldn't cost be part > of instruction itinerary? What latency? Each implementation has its own quirks and LLVM must be flexible enough to handle them. So cost needs to be a function of the CPU type as well as the

On May 1, 2009, at 3:50 PM, Chris Lattner wrote: > > The goal is to replace the pattern fragment and the C++ code for > X86::isMOVDDUPMask with something like: > > def movddup : PatFrag<(ops node:$lhs, node:$rhs), > (vector_shuffle node:$lhs, node:$rhs, > 0, 1, 0, 1, Cost<42>) > > Alternatively, the