Displaying 8 results from an estimated 8 matches for "ossowski".
2019 Dec 11
2
Glue two instructions together
You could hardcode a register for the pseudo instruction to use in the td file.
The register allocator will make sure not to clobber it.
let uses = [ R1 ], defs = [ R1 ] in {
def MYINST : Pseudo<>
}
On Wed, Dec 11, 2019 at 10:25 AM Przemyslaw Ossowski via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> I have one more question regarding expanding pseudo instruction.
>
> These two Machine Instructions, which I mentioned earlier, have to be one after another, but also have to 'communicate' using any General Purpose Regis...
2019 May 01
2
Assigning custom information to IR instruction and passing it to its correspondent in Selection DAG
On Wed, May 1, 2019 at 2:48 PM Przemyslaw Ossowski <
przemyslaw.ossowski at googlemail.com> wrote:
> Thanks Mehdi for the suggestion.
> I want to customize handling of 'load' instruction during processing DAG,
> but on IR level I want the 'load' to be treated in different passes as
> common load. So I'm afraid...
2019 May 01
2
Assigning custom information to IR instruction and passing it to its correspondent in Selection DAG
On Tue, Apr 30, 2019 at 3:51 PM Przemyslaw Ossowski via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi,
> as I wrote in mu previous post I wanted to somehow mark one IR instruction
> (in this particular case it would be 'load') during dedicated pass, which
> will set the marking based on neighboring instructions. Next...
2019 Dec 10
3
Glue two instructions together
Hi,
for DAG-to-DAG instruction selection I’ve implemented a pattern, which
creates from one SDNode two instructions, something like:
def: Pat<(NEW_SDNODE REG:$r1),
(INST_OUT (INST_IN), REG:$r1)>;
where INST_IN doesn't accepts any inputs and INST_OUT accepts two inputs -
one returned by INST_IN and REG;$r1.
Is there any possibility to ‘Glue’ two instruction created
2020 Jan 28
2
Handling node through TargetLowering::LowerOperation vs TargetLowering::ReplaceNodeResults
...on is also called for custom legalizing nodes with legal types
> after type legalization by both the vector op legalizer and the DAG
> legalizer. In those cases LowerOperation is called directly and does not
> call LowerOperationWrapper.
>
> On Tue, Jan 28, 2020 at 9:10 AM Przemyslaw Ossowski via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> Hi,
>>
>> I see that for different targets in classes which inherits from
>> TargetLowering there are implemented both methods:
>>
>> LowerOperation and ReplaceNodeResults
>>
>>
>...
2019 Apr 25
2
Assigning custom information to IR instruction and passing it to its correspondent in Selection DAG
Hello,
I’m looking for the best approach which would allow for marking given LLVM
IR instruction during IR custom pass and later utilizing that information
during DAG Instruction Selection in order to match given pattern based on
this marking.
I’m wondering if marking IR instruction utilizing Metadata is good idea.
But how later pass that information to DAG and appropriately mark in
2020 Jan 28
2
Handling node through TargetLowering::LowerOperation vs TargetLowering::ReplaceNodeResults
Hi,
I see that for different targets in classes which inherits from
TargetLowering there are implemented both methods:
LowerOperation and ReplaceNodeResults
What decides that for one given ISD we have to add handling in
LowerOperation and for other in ReplaceNodeResults, when for both
SetOperationAction is configured to be Custom?
Is it related with number of results of given operation and
2020 Sep 17
3
Unaligned Stack Pointer
Hi all,
my question is maybe not directly related with LLVM but general with
compilers.
The common approach is that compilers often don't align stack pointer for
leaf functions if the function utilizes stack just for keeping variables of
small sizes.
I’m wondering what is the benefit of such behavior.
Is saving a few bytes of the stack just once worth of such approach?
Or maybe