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On 2008-06-11, at 13:16, Gary Benson wrote: > Duncan Sands wrote: > >> Can you please attach IR which can be compiled to an executable >> (and shows the problem). > > I've been generating functions using a builder and then compiling > them with ExecutionEngine::getPointerToFunction(). Is there some way > I can get compilable IR from that?

Duncan Sands wrote: > Can you please attach IR which can be compiled > to an executable (and shows the problem). I've been generating functions using a builder and then compiling them with ExecutionEngine::getPointerToFunction(). Is there some way I can get compilable IR from that? Cheers, Gary -- http://gbenson.net/

On Mar 27, 2007, at 3:25 PM, Evan Cheng wrote: > > On Mar 25, 2007, at 7:12 AM, Christopher Lamb wrote: > >> While beginning to add vector registers to a back end I came >> across the following problem: as soon as I define two sets of >> registers that have a many-to-one mapping the live interval pass >> appears to double-kill the mapped-onto register. I

On Tue, 2012-05-01 at 19:58 -0500, Peter Bergner wrote: > On Tue, 2012-05-01 at 17:47 -0500, Hal Finkel wrote: > > By default it should build for > > whatever the current host is (no special flags required). To > > specifically build for something else, use: > > -ccc-host-triple powerpc64-unknown-linux-gnu > > or > > -ccc-host-triple

...function main: # @main # BB#0: # %entry addi %r1, %r1, -32 st %r31, %r1,28 st %r12, %r1,24 addi %r12, %r0, 0 st %r12, %r1,20 addi %r2, %r0, 1 call special_format oris r0,r0,0 subc r0, %r2, %r12 beq .LBB0_2 oris r0,r0,0 b .LBB0_1 oris r0,r0,0 # BB#1: # %if.then call abort oris r0,r0,0 .LBB0_2: # %if.end addi %r12, %r0, 0...

On Apr 3, 2007, at 3:45 PM, Christopher Lamb wrote: > >> Can you dump out the machine basic block? It should have an >> implicit use of V4R0 at first ORI but it should not be marked kill. >> If it is marked kill, then you need to walk LiveVariables.cpp to >> find out why. > > Here is the beginning of the BB dump. > > entry (0x8503c80, LLVM BB @0x8501af0,

On 04/29/2012 01:19 PM, Evan Cheng wrote: > On Apr 24, 2012, at 11:48 PM, Fan Dawei wrote: > >> For the following code fragment, >> >> ;<label>:27 ; preds = %27, %entry >> %28 = load volatile i32* inttoptr (i64 2149581832 to i32*), align 8 >> %29 = icmp slt i32 %28, 0 >> br i1 %29, label %27, label

For the following code fragment, ; <label>:27 ; preds = %27, %entry %28 = load volatile i32* inttoptr (i64 2149581832 to i32*), align 8 %29 = icmp slt i32 %28, 0 br i1 %29, label %27, label %loop.exit loop.exit: ; preds = %27 llc will generate following MIPS code, $BB0_1: lui $3, 32800 ori $3, $3, 1032 lw

*I am sorry for making you confused when I presented my problem.* *1. My steps for the test suit building:* (1) cd /home/qali/Src; * // This is my source directory for all application programs* (2) tar xzf llvm-2.8.tgz; * // now, the top directory of source tree is /home/qali/llvm-2.8* (3) cd llvm-2.8/projects (4) svn co http://llvm.org/svn/llvm-project/test-suite/trunk

Hello, ogg123 | ices2 are doing transcoding but ogg123 is staying frozen under certain circumstances here is the stack #0 0x401f25d4 in __pthread_sigsuspend () from /lib/libpthread.so.0 #1 0xbffff94c in ?? () #2 0x401f2398 in __pthread_wait_for_restart_signal () from /lib/libpthread.so.0 #3 0x401eef0b in pthread_cond_wait@GLIBC_2.0 () from /lib/libpthread.so.0 #4 0x0804b0d3 in

On Mar 25, 2007, at 7:12 AM, Christopher Lamb wrote: > While beginning to add vector registers to a back end I came across > the following problem: as soon as I define two sets of registers > that have a many-to-one mapping the live interval pass appears to > double-kill the mapped-onto register. I have the following excerpts > from my RegisterInfo.td. > > def V4R0

While beginning to add vector registers to a back end I came across the following problem: as soon as I define two sets of registers that have a many-to-one mapping the live interval pass appears to double- kill the mapped-onto register. I have the following excerpts from my RegisterInfo.td. def V4R0 : R4v<0 , "V4R0 ", []>, DwarfRegNum<0>; def R0 : Rg<0 ,

Gordon Henriksen wrote: > On 2008-06-11, at 13:16, Gary Benson wrote: > > Duncan Sands wrote: > > > Can you please attach IR which can be compiled to an executable > > > (and shows the problem). > > > > I've been generating functions using a builder and then compiling > > them with ExecutionEngine::getPointerToFunction(). Is there some > >

Hello All, I was trying to add Microblaze target to LLVM backend. I was able to generate object file with relocations. and debug symbols. When I try to link this object file with microblaze GCC linker I am getting below errors and debug symbols are missing in it. mb-objdump: DWARF error: found dwarf version '15877', this reader only handles version 2, 3, 4 and 5 information

On Apr 24, 2012, at 11:48 PM, Fan Dawei wrote: > For the following code fragment, > > ; <label>:27 ; preds = %27, %entry > %28 = load volatile i32* inttoptr (i64 2149581832 to i32*), align 8 > %29 = icmp slt i32 %28, 0 > br i1 %29, label %27, label %loop.exit > > loop.exit: ; preds = %27

...s, RDF would help with that, even if these instructions were not in the > same block. > > Once you have the node corresponding to the use of R3 in the last > statement, you can get the node corresponding to the reaching def of that > node. This def node would be a member of the "oris" statement. Within that > statement you would then look for use nodes and you'd find the use node for > R3: "oris r3, *r3*, 35809". From that node, you'd follow the reaching def > and this would give you: "sldi *r3*, r3, 32". Then you'd look for use nod...

On Tue, 2012-05-01 at 17:47 -0500, Hal Finkel wrote: > By default it should build for > whatever the current host is (no special flags required). To > specifically build for something else, use: > -ccc-host-triple powerpc64-unknown-linux-gnu > or > -ccc-host-triple powerpc-unknown-linux-gnu So LLVM isn't biarch capable? Meaning one LLVM compiler cannot generate both

...32 imm:$imm), (ORI (LIS (HI16 imm:$imm)), (LO16 imm:$imm))>; // ADD an arbitrary immediate. def : Pat<(add GPRC:$in, imm:$imm), (ADDIS (ADDI GPRC:$in, (LO16 imm:$imm)), (HA16 imm:$imm))>; // OR an arbitrary immediate. def : Pat<(or GPRC:$in, imm:$imm), (ORIS (ORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>; // XOR an arbitrary immediate. def : Pat<(xor GPRC:$in, imm:$imm), (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>; -Chris

...er $ cat ~/tmp/tl.c void foo(long); void bar() { for (int i = 0; i < 1600; ++i) foo(3494348345984503943); } $ clang -O3 -S -o - ~/tmp/tl.c -target powerpc64 ... # BB#0: # %entry ... lis 3, 12414 ori 3, 3, 27470 sldi 3, 3, 32 oris 3, 3, 35809 ori 30, 3, 20615 ... .LBB0_1: # %for.body mr 3, 30 bl foo ... There is a sequence of instructions used to materialize the constant, the first one (the lis) is trivially rematerialiable, and the others depend only on that one, and h...

---------- Forwarded message ---------- From: Qingan Li <ww345ww at gmail.com> Date: 2011/1/19 Subject: Re: [LLVMdev] About test suits Cont1 To: Eric Christopher <echristo at apple.com> *I am sorry for making you confused when I presented my problem.* *1. My steps for the test suit building:* (1) cd /home/qali/Src; * // This is my source directory for all application