Displaying 6 results from an estimated 6 matches for "orignod".
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origmod
2009 Jan 01
1
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
...s.size()));
> - assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on
> the fly!");
> + assert((Addr == 0 || Addr == &SUnits[0]) &&
> + "SUnits std::vector reallocated on the fly!");
> SUnits.back().OrigNode = &SUnits.back();
> return &SUnits.back();
> }
>
This works fine for me.
/Stein Roger
2008 Dec 31
0
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
...(SUnit(N, (unsigned)SUnits.size()));
- assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on
the fly!");
+ assert((Addr == 0 || Addr == &SUnits[0]) &&
+ "SUnits std::vector reallocated on the fly!");
SUnits.back().OrigNode = &SUnits.back();
return &SUnits.back();
}
2008 Dec 31
2
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
Bill Wendling wrote:
> On Dec 30, 2008, at 4:51 PM, srs wrote:
>
>
>> 2. There seems to be an issue in ScheduleDAGSDNodes.h when in debug
>> mode. The problem is the evaluation of "&SUnits[0];" which ASSERT's in
>> VC++'s vector[] implementation (when _HAS_ITERATOR_DEBUGGING is on).
>>
>> As a work-around, I commented out the debug
2008 Dec 31
4
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
...ndif
SUnits.push_back(SUnit(N, (unsigned)SUnits.size()));
- assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on
the fly!");
+ //assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on
the fly!");
SUnits.back().OrigNode = &SUnits.back();
return &SUnits.back();
}
2008 Dec 31
0
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
...SUnit(N, (unsigned)SUnits.size()));
> - assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on
> the fly!");
> + //assert(Addr == &SUnits[0] && "SUnits std::vector
> reallocated on
> the fly!");
> SUnits.back().OrigNode = &SUnits.back();
> return &SUnits.back();
> }
2010 Nov 12
1
[LLVMdev] ScheduleDAG Question
...ct/CMOV and scheduling.
In my test, I have a float select that has to be implemented with a
diamond CFG by the scheduler. The high level
ScheduleDAGSDNodes::EmitSchedule does this:
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
[...]
Emitter.EmitNode(SU->getNode(), SU->OrigNode != SU, SU->isCloned,
VRBaseMap);
[...]
}
TheInstrEmitter::EmitMachineNode does this:
if (II.usesCustomInsertionHook()) {
// Insert this instruction into the basic block using a target
// specific inserter which may returns a new basic block.
bool AtEnd...