search for: opus_x86_may_have_sse4_1

Displaying 20 results from an estimated 29 matches for "opus_x86_may_have_sse4_1".

2015 Nov 20
1
[PATCH] Fix x86 build if we presume SSE4.1 (and earlier), but not AVX.
...t/cpu_support.h index 133abbf..68fc606 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -45,7 +45,8 @@ #elif (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ - (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) + (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) || \ + (defined(OPUS_X86_MAY_HAVE_AVX) && !defined(OPUS_X86_PRESUME_AVX)) #include "x86/x86cpu.h" /* We currently support 5 x86 variants: diff --...
2015 Mar 13
1
[RFC PATCH v3] Intrinsics/RTCD related fixes. Mostly x86.
...overlap), in+c*(N+overlap)+N, overlap); if (N>COMBFILTER_MAXPERIOD) diff --git a/celt/celt_lpc.h b/celt/celt_lpc.h index dc8967f..323459e 100644 --- a/celt/celt_lpc.h +++ b/celt/celt_lpc.h @@ -48,7 +48,7 @@ void celt_fir_c( opus_val16 *mem, int arch); -#if !defined(OPUS_X86_MAY_HAVE_SSE4_1) +#if !defined(OVERRIDE_CELT_FIR) #define celt_fir(x, num, y, N, ord, mem, arch) \ (celt_fir_c(x, num, y, N, ord, mem, arch)) #endif diff --git a/celt/cpu_support.h b/celt/cpu_support.h index 1d62e2f..5e99a90 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -32,7 +32,8 @@ #includ...
2015 Mar 12
1
[RFC PATCHv2] Intrinsics/RTCD related fixes. Mostly x86.
...overlap), in+c*(N+overlap)+N, overlap); if (N>COMBFILTER_MAXPERIOD) diff --git a/celt/celt_lpc.h b/celt/celt_lpc.h index dc8967f..323459e 100644 --- a/celt/celt_lpc.h +++ b/celt/celt_lpc.h @@ -48,7 +48,7 @@ void celt_fir_c( opus_val16 *mem, int arch); -#if !defined(OPUS_X86_MAY_HAVE_SSE4_1) +#if !defined(OVERRIDE_CELT_FIR) #define celt_fir(x, num, y, N, ord, mem, arch) \ (celt_fir_c(x, num, y, N, ord, mem, arch)) #endif diff --git a/celt/cpu_support.h b/celt/cpu_support.h index 1d62e2f..5e99a90 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -32,7 +32,8 @@ #includ...
2016 May 31
2
[PATCH 1/2] Modify autoconf tests for intrinsics to stop clang from optimizing them away.
...return _mm_cvtsi128_si32(mtest); ]] ) AS_IF([test x"$OPUS_X86_MAY_HAVE_SSE2" = x"1" && test x"$OPUS_X86_PRESUME_SSE2" != x"1"], @@ -557,11 +564,13 @@ AS_IF([test x"$enable_intrinsics" = x"yes"],[ [OPUS_X86_MAY_HAVE_SSE4_1], [OPUS_X86_PRESUME_SSE4_1], [[#include <smmintrin.h> + #include <time.h> ]], [[ - static __m128i mtest; - mtest = _mm_setzero_si128(); - mtest = _mm_cmpeq_epi64(mtest, mtest); + __m128i mtest;...
2015 Mar 02
13
Patch cleaning up Opus x86 intrinsics configury
The attached patch cleans up Opus's x86 intrinsics configury. It: * Makes ?enable-intrinsics work with clang and other non-GCC compilers * Enables RTCD for the floating-point-mode SSE code in Celt. * Disables use of RTCD in cases where the compiler targets an instruction set by default. * Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in
2015 Nov 05
2
AVX Optimizations
Yes, Thank you. I'll follow up with the AVX code and tests for pitch code. Radu -----Original Message----- From: opus-bounces at xiph.org [mailto:opus-bounces at xiph.org] On Behalf Of Timothy B. Terriberry Sent: Thursday, November 5, 2015 10:31 AM To: opus at xiph.org Subject: Re: [opus] AVX Optimizations Velea, Radu wrote: > I've created a pull request[1] to enable configuration
2015 Nov 02
0
[PATCH 2/2] Fix unit tests on ARM without RTCD (e.g. aarch64 or iOS).
...ation.c | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/celt/tests/test_unit_dft.c b/celt/tests/test_unit_dft.c index bcee440..484dc57 100644 --- a/celt/tests/test_unit_dft.c +++ b/celt/tests/test_unit_dft.c @@ -47,8 +47,7 @@ #if defined(OPUS_X86_MAY_HAVE_SSE2) || defined(OPUS_X86_MAY_HAVE_SSE4_1) # include "x86/x86cpu.c" -#elif defined(OPUS_HAVE_RTCD) && \ - (defined(OPUS_ARM_ASM) || defined(OPUS_ARM_MAY_HAVE_NEON_INTR)) +#elif defined(OPUS_ARM_ASM) || defined(OPUS_ARM_MAY_HAVE_NEON_INTR) # include "arm/armcpu.c" # include "celt_lpc.c" # in...
2015 Nov 02
0
[PATCH 2/2] Fix unit tests on ARM without RTCD (e.g. aarch64 or iOS).
...ation.c | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/celt/tests/test_unit_dft.c b/celt/tests/test_unit_dft.c index bcee440..484dc57 100644 --- a/celt/tests/test_unit_dft.c +++ b/celt/tests/test_unit_dft.c @@ -47,8 +47,7 @@ #if defined(OPUS_X86_MAY_HAVE_SSE2) || defined(OPUS_X86_MAY_HAVE_SSE4_1) # include "x86/x86cpu.c" -#elif defined(OPUS_HAVE_RTCD) && \ - (defined(OPUS_ARM_ASM) || defined(OPUS_ARM_MAY_HAVE_NEON_INTR)) +#elif defined(OPUS_ARM_ASM) || defined(OPUS_ARM_MAY_HAVE_NEON_INTR) # include "arm/armcpu.c" # include "celt_lpc.c" # in...
2015 Nov 05
0
AVX Optimizations
...100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -43,23 +43,24 @@ */ #define OPUS_ARCHMASK 3 #elif (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) #include "x86/x86cpu.h" -/* We currently support 4 x86 variants: +/* We currently support 5 x86 variants: * arch[0] -> non-sse * arch[1] -> sse * arch[2] -> sse2 * arch[3] -> sse4.1 + * arch[4] -> avx */ -#def...
2015 Mar 18
5
[RFC PATCH v1 0/4] Enable aarch64 intrinsics/Ne10
Hi All, Since I continue to base my work on top of Jonathan's patch, and my previous Ne10 fft/ifft/mdct_forward/backward patches, I thought it would be better to just post all new patches as a patch series. Please let me know if anyone disagrees with this approach. You can see wip branch of all latest patches at https://git.linaro.org/people/viswanath.puttagunta/opus.git Branch:
2015 Nov 02
1
[PATCH 1/2] Declare silk_warped_LPC_analysis_filter_FIX_c in silk/fixed/main_FIX.h.
Fixes build failure on platforms with MAY_HAVE_SSE4_1 (but not PRESUME_SSE4_1) with --enable-intrinsics. --- silk/fixed/main_FIX.h | 11 +++++++++++ silk/x86/x86_silk_map.c | 2 ++ 2 files changed, 13 insertions(+) diff --git a/silk/fixed/main_FIX.h b/silk/fixed/main_FIX.h index ffeb4f3..375b5eb 100644 --- a/silk/fixed/main_FIX.h +++ b/silk/fixed/main_FIX.h @@ -97,6 +97,17 @@ void
2015 Nov 02
2
[PATCH 1/2] Declare silk_warped_LPC_analysis_filter_FIX_c in silk/fixed/main_FIX.h.
Fixes build failure on platforms with MAY_HAVE_SSE4_1 (but not PRESUME_SSE4_1) with --enable-intrinsics. --- silk/fixed/main_FIX.h | 11 +++++++++++ silk/x86/x86_silk_map.c | 2 ++ 2 files changed, 13 insertions(+) diff --git a/silk/fixed/main_FIX.h b/silk/fixed/main_FIX.h index ffeb4f3..375b5eb 100644 --- a/silk/fixed/main_FIX.h +++ b/silk/fixed/main_FIX.h @@ -97,6 +97,17 @@ void
2015 Mar 31
6
[RFC PATCH v1 0/5] aarch64: celt_pitch_xcorr: Fixed point series
Hi Timothy, As I mentioned earlier [1], I now fixed compile issues with fixed point and resubmitting the patch. I also have new patch that does intrinsics optimizations for celt_pitch_xcorr targetting aarch64. You can find my latest work-in-progress branch at [2] For reference, you can use the Ne10 pre-built libraries at [3] Note that I am working with Phil at ARM to get my patch at [4]
2015 Nov 05
2
AVX Optimizations
...f 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -43,23 +43,24 @@ */ #define OPUS_ARCHMASK 3 #elif (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) #include "x86/x86cpu.h" -/* We currently support 4 x86 variants: +/* We currently support 5 x86 variants: * arch[0] -> non-sse * arch[1] -> sse * arch[2] -> sse2 * arch[3] -> sse4.1 + * arch[4] -> avx */ -#def...
2015 May 08
8
[RFC PATCH v2]: Ne10 fft fixed and previous 0/8]
Hi All, As per Timothy's suggestion, disabling mdct_forward for fixed point. Only effects armv7,armv8: Extend fixed fft NE10 optimizations to mdct Rest of patches are same as in [1] For reference, latest wip code for opus is at [2] Still working with NE10 team at ARM to get corner cases of mdct_forward. Will update with another patch when issue in NE10 gets fixed. Regards, Vish [1]:
2015 May 15
11
[RFC V3 0/8] Ne10 fft fixed and previous
Hi All, Changes from RFC v2 [1] armv7,armv8: Extend fixed fft NE10 optimizations to mdct - Overflow issue fixed by Phil at ARM. Ne10 wip at [2]. Should be upstream soon. - So, re-enabled using fixed fft for mdct_forward which was disabled in RFCv2 armv7,armv8: Optimize fixed point fft using NE10 library - Thanks to Jonathan Lennox, fixed some build fixes on iOS and some copy-paste errors Rest
2015 Apr 28
10
[RFC PATCH v1 0/8] Ne10 fft fixed and previous
Hello Timothy / Jean-Marc / opus-dev, This patch series is follow up on work I posted on [1]. In addition to what was posted on [1], this patch series mainly integrates Fixed point FFT implementations in NE10 library into opus. You can view my opus wip code at [2]. Note that while I found some issues both with the NE10 library(fixed fft) and with Linaro toolchain (armv8 intrinsics), the work
2015 May 15
0
[RFC V3 7/8] armv7, armv8: Optimize fixed point fft using NE10 library
...f +#if defined(OPUS_ARM_MAY_HAVE_NEON_INTR) +#include "arm/celt_neon_intr.c" +#endif #include "celt_lpc.c" #include "pitch.c" -#include "arm/celt_neon_intr.c" #include "arm/arm_celt_map.c" -#endif #elif defined(OPUS_X86_MAY_HAVE_SSE2) || defined(OPUS_X86_MAY_HAVE_SSE4_1) #include "x86/x86cpu.c" #include "celt/x86/pitch_sse.c" diff --git a/celt/tests/test_unit_mdct.c b/celt/tests/test_unit_mdct.c index 53258fe..5d9a8f5 100644 --- a/celt/tests/test_unit_mdct.c +++ b/celt/tests/test_unit_mdct.c @@ -49,16 +49,16 @@ #if defined(OPUS_ARM_MAY_HAV...
2015 Feb 04
0
[RFC PATCH v2] armv7(float): Optimize encode usecase using NE10 library
...ON_INTR)) +#include "arm/armcpu.c" +#if defined(HAVE_ARM_NE10) +#include "arm/celt_ne10_fft.c" +#include "arm/celt_ne10_mdct.c" +#include "arm/celt_neon_intr.c" +#include "arm/arm_celt_map.c" +#endif +#elif defined(OPUS_X86_MAY_HAVE_SSE2) || defined(OPUS_X86_MAY_HAVE_SSE4_1) +#include "x86/x86cpu.c" +#endif #ifndef M_PI #define M_PI 3.141592653 @@ -93,13 +109,13 @@ void check(kiss_fft_cpx * in,kiss_fft_cpx * out,int nfft,int isinverse) } } -void test1d(int nfft,int isinverse) +void test1d(int nfft,int isinverse,int arch) { size_t buflen =...
2015 Mar 03
0
[RFC PATCHv3] armv7(float): Optimize encode usecase using NE10 library
...ON_INTR)) +#include "arm/armcpu.c" +#if defined(HAVE_ARM_NE10) +#include "arm/celt_ne10_fft.c" +#include "arm/celt_ne10_mdct.c" +#endif +#include "arm/celt_neon_intr.c" +#include "arm/arm_celt_map.c" +#elif defined(OPUS_X86_MAY_HAVE_SSE2) || defined(OPUS_X86_MAY_HAVE_SSE4_1) +#include "x86/x86cpu.c" +#endif #ifndef M_PI #define M_PI 3.141592653 @@ -93,13 +109,13 @@ void check(kiss_fft_cpx * in,kiss_fft_cpx * out,int nfft,int isinverse) } } -void test1d(int nfft,int isinverse) +void test1d(int nfft,int isinverse,int arch) { size_t buflen =...