Displaying 7 results from an estimated 7 matches for "oprand".
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2013 Apr 09
3
[LLVMdev] get the identifies of the unnamed temporaries from the instruction of LLVM IR
hi, Duncan,
thank you for your reply;
instruction "i->getOperand(0)->dump()" may print the %4 in the screen, but
how can i store it in a variable like char * oprand="%4" ?
--
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2009 Jul 10
2
[LLVMdev] Help: Instruction Pattern Matching question
Hello,
I am having some trouble matching patterns in targetinstructioninfo.td file with the CodeGen expectation. Could anybody please help?
Here is the example:
I want to emit instruction for adding 2 different kind of oprands. Basically i want to mix register types when I define the instruction for add,sub etc
I define the instruction TargetInstruction.td as follows:
class MyInst
<opcode op,subopcode subop,
dag outs, dag ins, string asmstr,list<dag> pattern>
Instruction
{
let Namespce = "MyNameSp...
2009 Jul 07
1
[LLVMdev] LLVM code target dependent generator question
...is not the right distribution list.
Question:
- I am having hard time lowering ADD instructions for different purposes. Basically, I want to have different machine instruction for pointer addition vs scalar addition. I am having hard time mapping LLVM add to my machine add instruction based on the oprand types.
Here is the sample code:
void myFunction( int* src, int* dst, int i )
{
dst[i] = src[i];
i = i + 4;
return;
}
I want to get this translate to my machine code as following:
shl R1028, R1026, 2
add_pointer R1029, R1024, R1028 // incrementing the src pointer
load R1030, R1029
add_p...
2009 Jul 07
0
[LLVMdev] LLVM code target dependent generator question
...is not the right distribution list.
Question:
- I am having hard time lowering ADD instructions for different purposes. Basically, I want to have different machine instruction for pointer addition vs scalar addition. I am having hard time mapping LLVM add to my machine add instruction based on the oprand types.
Here is the sample code:
void myFunction( int* src, int* dst, int i )
{
dst[i] = src[i];
i = i + 4;
return;
}
I want to get this translate to my machine code as following:
shl R1028, R1026, 2
add_pointer R1029, R1024, R1028 // incrementing the src pointer
load R1030, R1029
add_p...
2013 Apr 09
2
[LLVMdev] get the identifies of the unnamed temporaries from the instruction of LLVM IR
hi, Duncan:
thanks for your patience.
i have tried it.
using instuction: errs()<<i->getOperand(0);
but it prints the address: someting like 0x1139700;
i checked the defination of getOperand() is Value* getOperand( unsigned int
i);
so is there someting i missed?
--
View this message in context:
2013 Apr 09
0
[LLVMdev] get the identifies of the unnamed temporaries from the instruction of LLVM IR
Hi,
On 09/04/13 11:56, Dong Chen wrote:
> hi, Duncan:
> thanks for your patience.
> i have tried it.
> using instuction: errs()<<i->getOperand(0);
errs()<<*i->getOperand(0);
You can also use: i->getOperand(0)->dump();
Ciao, Duncan.
> but it prints the address: someting like 0x1139700;
> i checked the defination of getOperand() is Value* getOperand(
2013 Apr 09
0
[LLVMdev] get the identifies of the unnamed temporaries from the instruction of LLVM IR
On Tue, Apr 9, 2013 at 12:47 PM, Dong Chen <jameschennerd at gmail.com> wrote:
> hi, Duncan,
> thank you for your reply;
> instruction "i->getOperand(0)->dump()" may print the %4 in the screen, but
> how can i store it in a variable like char * oprand="%4" ?
>
>
http://llvm.org/docs/FAQ.html#what-api-do-i-use-to-store-a-value-to-one-of-the-virtual-registers-in-llvm-ir-s-ssa-representation
-- Sean Silva
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