Displaying 20 results from an estimated 74 matches for "opnd".
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2018 Dec 09
2
Parse LLVM IR
...std::cout << " Instruction " << &inst << " : " <<
inst.getOpcodeName();
unsigned int i = 0;
unsigned int opnt_cnt = inst.getNumOperands();
for(; i < opnt_cnt; ++i)
{
Value *opnd = inst.getOperand(i);
std::string o;
if (opnd->hasName()) {
o = opnd->getName();
std::cout << " " << o << "," ;
} else {
std::cout << "...
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...int NumOperands = numoperands;
list<SDTypeConstraint> Constraints = constraints;
}
// So: 2 results, 3 operands.
// Params are: passthru, mask, index; results are: vector of i1, ptr!!
// Params are 0, 1, 2 and results are 3, 4.
// Opnds 0 and 1 have vector type, with same number of elements.
// Opnds 0 and 2 have identical types.
// Opnds 1 and 3 have identical types.
// --> Opnd 3 (result 0?) is i1 vector
// Opnd 4 (result 1?) has pointer type.
// Opnd 1 is vector typ...
2017 Apr 29
5
[PATCH v2] nv50/ir: optimize shl(a, 0) to a
...s/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 015def0391..82da0d3e48 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -1284,6 +1284,13 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
case OP_SHL:
{
+ if (s == 1 && imm0.isInteger(0)) {
+ i->op = i->src(0).mod.getOp();
+ if (i->op != OP_CVT)
+ i->src(0).mod = 0;
+ i->setSrc(1, NULL);
+ break;
+ }...
2017 Apr 29
3
[PATCH] nv50/ir: optimmize shl(a, 0) to a
...s/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 015def0391..a2446e4df8 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -1284,6 +1284,11 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
case OP_SHL:
{
+ if (s == 1 && imm0.isInteger(0)) {
+ i->op = OP_MOV;
+ i->setSrc(1, NULL);
+ break;
+ }
if (s != 1 || i->src(0).mod != Modifier(0))
break;
// try to...
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...s;
> list<SDTypeConstraint> Constraints = constraints;
> }
>
> // So: 2 results, 3 operands.
> // Params are: passthru, mask, index; results are: vector of i1, ptr!!
> // Params are 0, 1, 2 and results are 3, 4.
> // Opnds 0 and 1 have vector type, with same number of elements.
> // Opnds 0 and 2 have identical types.
> // Opnds 1 and 3 have identical types.
> // --> Opnd 3 (result 0?) is i1 vector
> // Opnd 4 (result 1?) has pointer type.
> //...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...8i16);
return false;
}]>;
foreach RegId = 0-31 in
def Mask#RegId : MipsReg<0, "Mask"#RegId>, DwarfRegNum<[!add(RegId, 10)]>;
def VK128: RegisterClass<"Connex", [v128i1], 32, (sequence "Mask%u", 0, 31)>;
def VK128Opnd : RegisterOperand<VK128> {
let ParserMatchClass = MSA128AsmOperand;
}
class LD_INDIRECT_DESC_BASE2<string instr_asm,
ValueType TyNode,
RegisterOperand ROWD,
RegisterOperand ROWSI = ROWD,
R...
2016 Sep 30
2
[PATCH v2] nv50/ir: constant fold OP_SPLIT
...m/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 9875738..d56b057 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -932,6 +932,22 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
Instruction *newi = i;
switch (i->op) {
+ case OP_SPLIT: {
+ uint8_t size = typeSizeof(i->dType);
+ DataType type = typeOfSize(size / 2, isFloatType(i->dType),
+ isSignedType(i->dType)...
2015 Jan 11
2
[PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
...degen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> index 21d20ca..aaf0d0d 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> @@ -997,6 +997,79 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
> i->op = OP_MOV;
> break;
> }
> + case OP_CVT: {
> + Storage res;
> + bld.setPosition(i, true); /* make sure bld is init'ed */
> + switch(i->dType) {
> + case TYPE_U16:
> +...
2016 Sep 27
2
[PATCH] nv50/ir: constant fold OP_SPLIT
...m/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 74a5a85..fdddd71 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -920,6 +920,29 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
Instruction *newi = i;
switch (i->op) {
+ case OP_SPLIT: {
+ uint16_t shift = 0;
+ DataType type = TYPE_NONE;
+ bld.setPosition(i, false);
+ if (i->sType == TYPE_U64 || i->sType == TYPE_S64) {
+ shift...
2014 Jun 03
8
[PATCH v2 0/4] Constant folding of new Instructions
And another try for constant folding of Instructions for nvc0.
Please Review this!
Thanks,
Tobias Klausmann
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant expressions
2016 Sep 30
2
[PATCH] nv50/ir: constant fold OP_SPLIT
...ephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> index 74a5a85..fdddd71 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> @@ -920,6 +920,29 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
>> Instruction *newi = i;
>>
>> switch (i->op) {
>> + case OP_SPLIT: {
>> + uint16_t shift = 0;
>> + DataType type = TYPE_NONE;
>> + bld.setPosition(i, false);
>> + if...
2015 May 09
2
[PATCH 3/4] nvc0/ir: optimize set & 1.0 to produce boolean-float sets
...degen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> index 14446b6..d8af19a 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> @@ -973,6 +973,35 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
> }
> break;
>
> + case OP_AND:
> + {
> + CmpInstruction *cmp = i->getSrc(t)->getInsn()->asCmp();
> + if (!cmp || cmp->op == OP_SLCT)
how about if (cmp == NULL || ...) and kill the same...
2014 May 18
1
[PATCH 1/2] nv50/ir: fix s32 x s32 -> high s32 multiply logic
Retrieving the high 32 bits of a signed multiply is rather annoying. It
appears that the simplest way to do this is to compute the absolute
value of the arguments, and perform a u32 x u32 -> u64 operation. If the
arguments' signs differ, then negate the result. Since there is no u64
support in the cvt instruction, we have the perform the 2's complement
negation "by hand".
2015 Mar 25
0
[PATCH] nv50/ir: take postFactor into account when doing peephole optimizations
...;
Instruction *mul1 = NULL; // mul1 before mul2
int e = 0;
- float f = imm2.reg.data.f32;
+ float f = imm2.reg.data.f32 * exp2f(mul2->postFactor);
ImmediateValue imm1;
assert(mul2->op == OP_MUL && mul2->dType == TYPE_F32);
@@ -782,9 +785,10 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
i->op = OP_MOV;
i->setSrc(0, new_ImmediateValue(prog, 0u));
i->src(0).mod = Modifier(0);
+ i->postFactor = 0;
i->setSrc(1, NULL);
} else
- if (imm0.isInteger(1) || imm0.isInte...
2015 Jan 11
2
[PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
.../gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>> index 21d20ca..aaf0d0d 100644
>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>> @@ -997,6 +997,79 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue
>>> &imm0, int s)
>>> i->op = OP_MOV;
>>> break;
>>> }
>>> + case OP_CVT: {
>>> + Storage res;
>>> + bld.setPosition(i, true); /* make sure bld is init'ed */
>...
2015 Jan 11
2
[PATCH v2] nv50/ir: Handle OP_CVT when folding constant expressions
...e.cpp
>>>>>> index 9a0bb60..741c74f 100644
>>>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>>>>> @@ -997,6 +997,87 @@ ConstantFolding::opnd(Instruction *i,
>>>>>> ImmediateValue
>>>>>> &imm0, int s)
>>>>>> i->op = OP_MOV;
>>>>>> break;
>>>>>> }
>>>>>> + case OP_CVT: {
>>>>>> +...
2016 Oct 02
2
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...rivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 9875738..8bb5cf9 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -1008,13 +1008,22 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
break;
case OP_MAD:
if (imm0.isInteger(0)) {
+ ImmediateValue imm1;
i->setSrc(0, i->getSrc(2));
i->src(0).mod = i->src(2).mod;
i->setSrc(1, NULL);
i->setSrc(2, NULL);...
2015 Jan 11
2
[PATCH v2] nv50/ir: Handle OP_CVT when folding constant expressions
.../nouveau/codegen/nv50_ir_peephole.cpp
>>>> index 9a0bb60..741c74f 100644
>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>>>> @@ -997,6 +997,87 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue
>>>> &imm0, int s)
>>>> i->op = OP_MOV;
>>>> break;
>>>> }
>>>> + case OP_CVT: {
>>>> + Storage res;
>>>> + bld.setPosition(i, true); /* make...
2015 Jan 11
2
[PATCH v2] nv50/ir: Handle OP_CVT when folding constant expressions
...ephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> index 9a0bb60..741c74f 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> @@ -997,6 +997,87 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
>> i->op = OP_MOV;
>> break;
>> }
>> + case OP_CVT: {
>> + Storage res;
>> + bld.setPosition(i, true); /* make sure bld is init'ed */
>> + switch(i->dType) {
&g...
2016 May 29
1
How to find variable names from LLVM IR?
If I have an operand as a Value from an instruction like: Value* V =
opnd->get(); and I am sure this is a variable, I want to know the variable
name (in source code) for this Value object. I am doing it like this:
const Function* Func;
if (const Argument* Arg = dyn_cast<Argument>(V))
{...