search for: oping

Displaying 20 results from an estimated 61 matches for "oping".

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2010 Nov 05
0
[LLVMdev] Basic block liveouts
Because I feel bad for giving a non-answer: An easy way to find if a virtual register is alive after the basic block is to While iterating over the virtual registers - Check to see if the virtual register's "next" value exists outside of the basic block. for instance: std::vector<unsigned> findLiveOut( MachineBasicBlock * mbb ) { std::vector<unsigned> liveout; for(
2005 Jul 25
2
[LLVMdev] How to partition registers into different RegisterClass?
Thanks, I think it can solve my problem. But please allow me to explain the hardware in detail. Hope there is more elegant way to solve it. The hardware is a "stream processor". That is, It processes samples one by one. Each sample is associated with several 128-bit four-element vector registers, namely: * input registers - the attributes of the sample, the values of the registers
2010 Nov 05
4
[LLVMdev] Basic block liveouts
Is there an easy way to obtain all liveout variables of a basic block? Liveins can be found for each MachineBasicBlock, but I can only find liveouts for the whole function, at MachineRegisterInfo. Do I need to find them out manually?
2010 Aug 29
1
[LLVMdev] [Query] Programming Register Allocation
Thanks for the information. I still don't know how do I partition registers into different classes from the virtual registers? For instance, I have the function who which iterates over the instructions, but I don't know how to write the function which returns the different register class. void RAOptimal::Gather(MachineFunction &Fn) { // Gather just iterates over the blocks,
2005 Jul 22
0
[LLVMdev] How to partition registers into different RegisterClass?
On Fri, Jul 22, 2005 at 10:29:38AM +0800, Tzu-Chien Chiu wrote: > I' have three set of registers - read-only regs, general purpose regs > (read and write), and write-only regs. How should I partition them > into different RegisterClasses so that I can easy define the > instruction? [snip] > def MOV : BinaryInst<2, (ops GeneralPurposeRegClass :$dest, >
2005 Jul 23
0
[LLVMdev] How to partition registers into different RegisterClass?
On Sat, 23 Jul 2005, Tzu-Chien Chiu wrote: > 2005/7/23, Chris Lattner <sabre at nondot.org>: >> What does a 'read only' register mean? Is it a constant (e.g. returns >> 1.0)? Otherwise, how can it be a useful value? > > Yes, it's a constant register. > > Because the instruction cannot contain an immediate value, a constant > value may be stored in
2005 Jul 22
2
[LLVMdev] How to partition registers into different RegisterClass?
Hi, everyone. I' have three set of registers - read-only regs, general purpose regs (read and write), and write-only regs. How should I partition them into different RegisterClasses so that I can easy define the instruction? All RegisterClasses must be mutally exclusive. That is, a register can only be in a RegisterClass. Otherwise TableGen will raise an error message. def
2005 Jul 23
3
[LLVMdev] How to partition registers into different RegisterClass?
2005/7/23, Chris Lattner <sabre at nondot.org>: > > What does a 'read only' register mean? Is it a constant (e.g. returns > 1.0)? Otherwise, how can it be a useful value? Yes, it's a constant register. Because the instruction cannot contain an immediate value, a constant value may be stored in a constant register, and it's defined _before_ the program starts by
2005 Jul 22
2
[LLVMdev] How to partition registers into different RegisterClass?
All registers in my hardware are 4-element vector registers (128-bit). Some are floating point registers, and the others are integer registers. I typedef two packed classes: [4 x float] and [4 x int], and add an enum 'packed' to MVT::ValueType (ValuesTypes.h). I declared all 'RegisterClass'es to be 'packed' (first argument of RegisterClass): def GeneralPurposeRC :
2005 Jul 26
0
[LLVMdev] How to partition registers into different RegisterClass?
On Mon, 25 Jul 2005, Tzu-Chien Chiu wrote: > But please allow me to explain the hardware in detail. Hope there is > more elegant way to solve it. Sounds good! > The hardware is a "stream processor". That is, It processes samples > one by one. Each sample is associated with several 128-bit > four-element vector registers, namely: > > * input registers - the
2004 Apr 05
1
Win2k Clients cant connect to Samba 2.2.8
Hello, I have a "small" Problem. I have a Network with some Samba servers, one of them is behind a firewall. I can not access this Server with Win2k/2k3 Clients. I can access the Server with WinNT Clients and I can access the Server with win2k Clients which are also behind the FW. I can see the Server in the browslist, but if I try to ope the link I get the following Error: Auf
2007 May 24
1
Squid +Yum = apt-cacher?
Hi all, I was wondering if would be possible to configure squid to co ope with yum so it recognize mirrors and it can cache rpm packages based on package name and maybe some other parameter to be sure that is the right package. Any ideas? Cheers, Lorenzo
2013 Jan 30
1
how to customize puppet-haproxy module??
Dear all, I''ve just started using puppet-haproxy module and planing to role it out department-wide, so that other group/team/project also can make use it as a core-module. As the several other groups are involved, their requirements are also different. I have two Qs here: How do I customize the "Listen" and "default" section without modifying the actual listen.pp
2009 Oct 16
2
[LLVMdev] [cfe-dev] Developer meeting videos up
On 10/16/2009 07:36 PM, David Greene wrote: > On Friday 16 October 2009 02:52, Fons Rademakers wrote: > >> At CERN we had already a number of people questioning the wisdom of basing >> our developments on LLVM as it is perceived as an Apple thing, that could >> turn on us at anytime, and this position does not help. > > Ditto. I've heard this more than once from
2010 Aug 29
0
[LLVMdev] [Query] Programming Register Allocation
On Sat, Aug 28, 2010 at 16:20:42 -0400, Jeff Kunkel wrote: > What I need to know is how to access the machine register classes. Also, I > need to know which virtual register is to be mapped into each specific > register class. I assume there is type information on the registers. I need > to know how to access it. MachineRegisterInfo::getRegClass will give you the TargetRegisterClass
2003 Jun 16
2
h323 compile error
The following occurs with code from yesterday's cvs (asterisk) and current OpenH323 code: [root@raid-2 h323]# make clean install rm -f *.o *.so core.* cc -g -pg -c -o chan_h323.o -pipe -Wall -fPIC -Wmissing-prototypes -Wmissing-declarations - DP_LINUX -D_REENTRANT -D_GNU_SOURCE -march=i686 -DPBYTE_ORDER=PLITTLE_ENDIA N -DP_HAS_SEMAPHORES -DP_SSL -DP_PTHREADS -DPHAS_TEMPLATES -DPTRACING
2006 Mar 31
1
oh323 - unable to install
I'm and Asterisk@home user - been so now for almost a year. Lately, I've upgraded to the latest & greatest.. (which is built on 1.2.5) and am unable to install oh323. I've already asked over at the (A@H) Sourceforge forum but no one seems to think it worth answering. The error I get is pretty obvious but I don't know where to go from here. More importantly, I need to have
2018 Feb 27
3
Established connection timing out
I don't believe you've said: are the disconnects happening during periods of idleness on the connection, or periods of activity? If idleness, some device or script could be actively doing a disconnect-on-idle. On Mon, 26 Feb 2018, Kip Warner wrote: > Hey list, > > I've read the man page for both the client and server daemon, so either > I missed something or this
2010 Aug 28
2
[LLVMdev] [Query] Programming Register Allocation
So I have a good understanding of what and how I want to do in the abstract sense. I am starting to gain a feel for the code base, and I see that I may have a allocator up and running much faster than I once thought thanks to the easy interfaces. What I need to know is how to access the machine register classes. Also, I need to know which virtual register is to be mapped into each specific
2018 Mar 20
2
[PATCH] Support for Ambisonics
Just to confirm, I would use opeint_* for all the OpusGenericEncoder-related functions? On Tue, Mar 20, 2018 at 8:38 AM Jean-Marc Valin <jmvalin at jmvalin.ca> wrote: > Hi Mark, Drew, > > On 03/20/2018 02:40 AM, Mark Harris wrote: > > + int _oge_use_projection(int channel_mapping); > > > > These functions are part of libopusenc, so I'd expect them to have an