search for: operands_begin

Displaying 7 results from an estimated 7 matches for "operands_begin".

2015 Dec 19
2
get instruction destination register
Hello everyone, I am trying to write a code to do the following: 1. Get an ARM machine instruction 2. Find destination register of that instruction that has been written 3. set a bit in a vector, according to that register number. (Since it's ARM, I have a 15 bit vector) It means if I have : add r0, r1, r0 I want to get r0 as dest reg and set the index 0 of my vector to 1. I get my machine
2016 Oct 28
2
Understanding and Cleaning Up Machine Instruction Bundles
...ed. The thing you get when you use `for (MachineOperand &MO : someinstruction.operands()) { ... }` which is the standard for the majority of codegen passes today. > > You can’t replace an instr iterator with a bundle iterator without breaking some basic invariants: > MI == MI->operands_begin()->getParent() > > That’s why passes should explicitly ask for the bundle operands. If we move to a BUNDLE-less world then the majority of passes will need something like MIBundleOperands, in that case we really should replace MachineInstr::iterator anyway, make the typical use the most c...
2016 Oct 28
0
Understanding and Cleaning Up Machine Instruction Bundles
...er instead of being in the confusin in-between state > that we have today. > > - Matthias I’m not sure what you mean by changing MachineInstr::iterator. You mean mop_iterator? You can’t replace an instr iterator with a bundle iterator without breaking some basic invariants: MI == MI->operands_begin()->getParent() That’s why passes should explicitly ask for the bundle operands. -Andy
2015 Dec 21
2
get instruction destination register
...> <llvm-dev at lists.llvm.org> wrote: > > I get my machine instruction, but I don't know how to get dest reg. I > looked > > at MachineInstr.h but couldn't find it out. > > You probably want to iterate through the instruction's operands > (MachineInstr::operands_begin/end) looking for defines ("isDef") of > the registers you care about. Some instructions will write multiple > registers (e.g. ldrd), and the information is in a certain sense > approximate (an empty inline asm block may be marked as writing some > registers, but not actually d...
2016 Oct 28
0
Understanding and Cleaning Up Machine Instruction Bundles
...when you use > `for (MachineOperand &MO : someinstruction.operands()) { ... }` which is the standard for the majority of codegen passes today. > >> >> You can’t replace an instr iterator with a bundle iterator without breaking some basic invariants: >> MI == MI->operands_begin()->getParent() >> >> That’s why passes should explicitly ask for the bundle operands. > If we move to a BUNDLE-less world then the majority of passes will need something like MIBundleOperands, in that case we really should replace MachineInstr::iterator anyway, make the typical u...
2016 Oct 27
4
Understanding and Cleaning Up Machine Instruction Bundles
I am using machine instruction bundles [1] before register allocation. This appears not to be too common today and I'd really like some input on the intentions and plans of the current system. And would like some input on clean up proposals. [1] I am currently experimenting to use machine instruction bundles to reliably form macroop fusion opportunities without spills, reloads, splits or
2017 Nov 11
2
Update control flow graph when splitting a machine basic block?
Thank you for your reply! > Every MachineBasicBlock has a list of successors; you can access it with > the successors() accessor. That's what you should be using for any CFG > analysis. I am aware of these methods of class MachineBasicBlock, which allows one to access a MachineBasicBlock's successors and predecessors in the CFG. But the CFG itself may no longer be valid if a