Displaying 2 results from an estimated 2 matches for "operandinfo107".
2008 Mar 19
2
[LLVMdev] SUBREG instructions and mayLoad/mayStore/etc.
The new SUBREG target-independent instructions aren't getting
mayLoad/mayStore flags set correctly.
For example, in the generated X86GenInstrInfo.inc file,
there is only one entry for INSERT_SUBREG:
{ 5, 4, 1, 0, "INSERT_SUBREG", 0, 0, NULL, NULL,
OperandInfo107 }, // Inst #5 = INSERT_SUBREG
THe sixth field is zero, which means it doesn't have the the
MayLoad flag set.
x86-64 does have a few variants of INSERT_SUBREG, and one of
them does have a load:
def : Pat<(i64 (anyext (loadi32 addr:$src))),
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), (...
2008 Mar 19
0
[LLVMdev] SUBREG instructions and mayLoad/mayStore/etc.
...target-independent instructions aren't getting
> mayLoad/mayStore flags set correctly.
>
> For example, in the generated X86GenInstrInfo.inc file,
> there is only one entry for INSERT_SUBREG:
>
> { 5, 4, 1, 0, "INSERT_SUBREG", 0, 0, NULL, NULL,
> OperandInfo107 }, // Inst #5 = INSERT_SUBREG
>
> THe sixth field is zero, which means it doesn't have the the
> MayLoad flag set.
I am not sure I understand. INSERT_SUBREG shouldn't have mayLoad /
mayStore flags set. If it's not coalesced away, it's eventually
lowered into a move....