search for: operand2

...+#include <asm/sysinfo.h> +#include "gaccess.h" +#include "kvm-s390.h" + +static int handle_set_prefix(struct kvm_vcpu *vcpu) +{ + int base2 = vcpu->arch.sie_block->ipb >> 28; + int disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16); + u64 operand2; + u32 address = 0; + u8 tmp; + + vcpu->stat.instruction_spx++; + + operand2 = disp2; + if (base2) + operand2 += vcpu->arch.guest_gprs[base2]; + + /* must be word boundary */ + if (operand2 & 3) { + kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); + goto out; + } + + /* get the va...

...1 flags register (fl) // // instruction encoding // ++++++++++++++++++++ // // byte 1 byte 2 (optional) // bits [ 7 6 5 4 3 2 1 0 ] [ 7 6 5 4 3 2 1 0 ] // opcode - - - // mod - // operand1 - - - - // operand2 - - - - - - - - // // operand1 is always a register index // operand2 is optional, depending upon the instruction set specified below // the value of mod alters the meaning of any operand2 // 0: operand2 = reg ix // 1: operand2 = fixed immediate v...

On Tue, Mar 4, 2014 at 3:11 PM, Sean Silva <chisophugis at gmail.com> wrote: > On Tue, Mar 4, 2014 at 4:04 PM, Mark Seaborn <mseaborn at chromium.org>wrote: > >> The PNaCl project has implemented various IR simplification passes that >> simplify LLVM IR by lowering complex features to simpler features. We'd >> like to upstream some of these IR passes to

Hi, Let say i am writing a code inside basic block pass and iterating all the instructions inside, and i encountered in this instruction : %3 = add i32 %1, 2 I want to convert this instruction to something like this: add R1, 2, R3 I know the opocode, but i what i need is, the operands %1 and 2 (in this example). I will be grateful if some one will tell me how to do so . -------------- next

...> > Let say i am writing a code inside basic block pass and iterating all > the instructions inside, > and i encountered in this instruction : If you're asking how to get the operands of an Instruction, use the getOperand() method: Value * Operand1 = I->getOperand(0); Value * Operand2 = I->getOperand(1); The LLVM doxygen documentation (http://llvm.org/doxygen/) is an invaluable resource. You may also want to read the Programmer's Guide (http://llvm.org/docs/ProgrammersManual.html). Does this answer your question? -- John T. > > %3 = add i32 %1, 2 > > I...

...CPU feature not currently enabled add r2, pc, r2 According to ARM specification:Use of PC and SP in Thumb instructionsIn most of these instructions, you cannot use PC (R15) for Rd, or any operand.The exceptions are:you can use PC for Rn in 32-bit Thumb ADD and SUB instructions, with a constant Operand2 value in the range 0-4095, and no S suffix. These instructions are useful for generating PC-relative addresses. Bit[1] of the PC value reads as 0 in this case, so that the base address for the calculation is always word-aligned.you can use PC in 16-bit Thumb ADD{cond} Rd, Rd, Rm instructions, where...

...p://infocenter.arm.com/help/topic/com.arm.doc.common/images/triangle_down.png]Use of PC and SP in Thumb instructions In most of these instructions, you cannot use PC (R15) for Rd, or any operand. The exceptions are: * you can use PC for Rn in 32-bit Thumb ADD and SUB instructions, with a constant Operand2 value in the range 0-4095, and no S suffix. These instructions are useful for generating PC-relative addresses. Bit[1] of the PC value reads as 0 in this case, so that the base address for the calculation is always word-aligned. * you can use PC in 16-bit Thumb ADD{cond} Rd, Rd, Rm instructions, w...

This patch series introduces a backend for kvm to run on IBM System z machines that uses the mainframe's sie virtualization capability. This work runs 64bit guests on z800/z890/z900/z990/z9/z10 class machines with a 64bit linux host. Userspace will follow once we're done brushing it over. The patch queue consists of the following patches, which can be applied in sequence on top of kvm.git

This patch series introduces a backend for kvm to run on IBM System z machines that uses the mainframe's sie virtualization capability. This work runs 64bit guests on z800/z890/z900/z990/z9/z10 class machines with a 64bit linux host. Userspace will follow once we're done brushing it over. The patch queue consists of the following patches, which can be applied in sequence on top of kvm.git