Displaying 5 results from an estimated 5 matches for "opc_emitmergeinputchains1_0".
2016 Jan 15
2
Expanding a PseudoOp and accessing the DAG
...obalAddress),
> /*2245*/ OPC_MoveParent,
> /*2246*/ OPC_MoveParent,
> /*2247*/ OPC_CheckPredicate, 5, // Predicate_unindexedload
> /*2249*/ OPC_CheckPredicate, 6, // Predicate_load
> /*2251*/ OPC_CheckType, MVT::i64,
> /*2253*/ OPC_EmitMergeInputChains1_0,
> /*2254*/ OPC_EmitInteger, MVT::i64, 0,
> /*2257*/ OPC_MorphNodeTo, TARGET_VAL(XSTG::LOADI64_RI),
> 0|OPFL_Chain|OPFL_MemRefs,
> 1/*#VTs*/, MVT::i64, 2/*#Ops*/, 1, 2,
> // Src: (ld:i64 (XSTGADDR_NORMAL:iPTR
> (tglobalad...
2016 Jan 15
2
Expanding a PseudoOp and accessing the DAG
On 1/15/2016 1:08 PM, Phil Tomson wrote:
>
> Ah, I see, the defm is a multi-class so I needed to change it to:
>
> def: Pat<(load (XSTGADDR_NORMAL tglobaladdr:$addr)),
> (LOADI64_RI tglobaladdr:$addr, 0)>;
> // Match load from a relocatable address to a load with GRP:
> def: Pat<(load (XSTGADDR_USE_GRP tglobaladdr:$addr)),
> (LOADI64_RI
2014 Nov 05
2
[LLVMdev] Virtual register def doesn't dominate all uses
...ive you basic directions?
I had a look at the matcher table and it looks as follows:
/*4309*/ /*Scope*/ 12, /*->4322*/
/*4310*/ OPC_CheckOpcode, TARGET_VAL(MBPISD::RET_FLAG),
/*4313*/ OPC_RecordNode, // #0 = 'retflag' chained node
/*4314*/ OPC_CaptureGlueInput,
/*4315*/ OPC_EmitMergeInputChains1_0,
/*4316*/ OPC_MorphNodeTo, TARGET_VAL(MyTarget::RETL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_Variadic0,
0/*#VTs*/, 0/*#Ops*/,
// Src: (retflag) - Complexity = 3
// Dst: (RETL)
/*4322*/ /*Scope*/ 11, /*->4334*/
/*4323*/ OPC_RecordNode, // #0 = $a
/*432...
2014 Nov 03
2
[LLVMdev] Virtual register def doesn't dominate all uses
Hi Quentin,
>> Yes, the dags in view-isel-dags and view-legalize-types-dags are correct (the add operations are here and are their results are used) and the dags are the same.
>
> And what about view-sched-dags?
The DAG looks like I described below (*)
> This one should give you what has been selected. So if this is not correct, you have indeed a problem in the selection
2016 Jun 22
2
LLVM Backend Issues
Thanks Anton and Krzysztof!
Here is the dump using the -debug flag. At this point I am not making much
sense of this, would it be too much to ask if one of you could walk me
through one of these lines?
One thing that I didn't point out is that I never defined any separate
floating point registers, not sure if this will pose any issue?
Thanks again for your time!
Jeff
jeff at