Displaying 5 results from an estimated 5 matches for "op_txg".
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op_txf
2014 Apr 04
2
[PATCH 1/2] nvc0: add support for texture gather
...4..a4b50ee 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -984,6 +984,9 @@ CodeEmitterGK110::emitTEX(const TexInstruction *i)
case OP_TXF:
code[1] = 0x78000000;
break;
+ case OP_TXG:
+ code[1] = 0x7dc00000;
+ break;
default:
code[1] = 0x7d800000;
break;
@@ -1005,6 +1008,11 @@ CodeEmitterGK110::emitTEX(const TexInstruction *i)
code[1] = 0x70000000;
code[1] |= i->tex.r << 13;
break;
+ case OP_...
2014 Feb 20
0
[PATCH] nv50: enable txg where supported
...ir_emit_nv50.cpp
index bef103f..e2f93bb 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -1447,7 +1447,7 @@ CodeEmitterNV50::emitTEX(const TexInstruction *i)
code[0] |= 0x01000000;
break;
case OP_TXG:
- code[0] = 0x01000000;
+ code[0] |= 0x01000000;
code[1] = 0x80000000;
break;
default:
@@ -1790,6 +1790,7 @@ CodeEmitterNV50::emitInstruction(Instruction *insn)
case OP_TXB:
case OP_TXL:
case OP_TXF:
+ case OP_TXG:
emitTEX(insn->asTex());...
2014 May 13
1
[PATCH 1/2] nv50/ir: make sure that texprep/texquerylod's args get coalesced
...au/codegen/nv50_ir_ra.cpp
index 60a6a3f..b284081 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -998,7 +998,9 @@ GCRA::doCoalesce(ArrayList& insns, unsigned int mask)
case OP_TXQ:
case OP_TXD:
case OP_TXG:
+ case OP_TXLQ:
case OP_TEXCSAA:
+ case OP_TEXPREP:
if (!(mask & JOIN_MASK_TEX))
break;
for (c = 0; insn->srcExists(c) && c != insn->predSrc; ++c)
--
1.8.5.5
2014 Jul 05
1
[PATCH 1/2] nvc0/ir: use manual TXD when offsets are involved
Something about how we're implementing offsets for TXD is wrong, just
flip to the generic quadop-based implementation in that case.
This is the minimal fix appropriate for backporting.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: <mesa-stable at lists.freedesktop.org>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 ++-
1 file changed, 2
2014 Feb 28
0
[PATCH] nv50: enable texture query lod
...nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
index 857980d..286ac83 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
@@ -117,6 +117,7 @@ enum operation
OP_TXQ, // texture size query
OP_TXD, // texture derivatives
OP_TXG, // texture gather
+ OP_TXLQ, // texture query lod
OP_TEXCSAA, // texture op for coverage sampling
OP_TEXPREP, // turn cube map array into 2d array coordinates
OP_SULDB, // surface load (raw)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/...