Displaying 3 results from an estimated 3 matches for "op_rsq".
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op_ret
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++-
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index dfb093c..e38a3b8 100644
---
2015 Feb 23
2
[PATCH 1/2] nv50/ir: add fp64 support on G200 (NVA0)
...three_half));
+ }
+
+ i->op = OP_MOV;
+ i->setSrc(0, guess);
+}
+
+
bool
NV50LegalizeSSA::visit(BasicBlock *bb)
{
@@ -578,6 +668,11 @@ NV50LegalizeSSA::visit(BasicBlock *bb)
case OP_MUL:
handleMUL(insn);
break;
+ case OP_RCP:
+ case OP_RSQ:
+ if (insn->dType == TYPE_F64)
+ handleDRCPRSQ(insn);
+ break;
default:
break;
}
@@ -1162,7 +1257,7 @@ NV50LoweringPreSSA::handleDIV(Instruction *i)
bool
NV50LoweringPreSSA::handleSQRT(Instruction *i)
{
- Instruction *rsq = bld.mkOp1(OP_RS...
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
I went through the gallium-nine tree and picked out nouveau patches that are
general bug-fixes. The first bunch I'd like to also get into 10.2. I've
reviewed all of them and they make sense to me, but sending them out for
public review as well in case there are any objections.
Unless I hear objections, I'd like to push this by Friday.
Christoph Bumiller (11):
nv50,nvc0: always pull