Displaying 20 results from an estimated 26 matches for "op_mul".
2015 Feb 23
2
[PATCH 1/2] nv50/ir: add fp64 support on G200 (NVA0)
...tDADD(insn);
+ else if (isFloatType(insn->dType))
emitFADD(insn);
else if (insn->getDef(0)->reg.file == FILE_ADDRESS)
emitAADD(insn);
@@ -1733,14 +1803,18 @@ CodeEmitterNV50::emitInstruction(Instruction *insn)
emitUADD(insn);
break;
case OP_MUL:
- if (isFloatType(insn->dType))
+ if (insn->dType == TYPE_F64)
+ emitDMUL(insn);
+ else if (isFloatType(insn->dType))
emitFMUL(insn);
else
emitIMUL(insn);
break;
case OP_MAD:
case OP_FMA:
- if (isFloatType(insn->dTyp...
2015 Feb 23
2
[Mesa-dev] [PATCH 2/2] nvc0/ir: improve precision of double RCP/RSQ results
...P) {
> + // RCP: x_{n+1} = 2 * x_n - input * x_n^2
> + Value *two = bld.getSSA(8);
> +
> + bld.mkCvt(OP_CVT, TYPE_F64, two, TYPE_F32, bld.loadImm(NULL, 2.0f));
> +
> + guess = bld.mkOp2v(OP_SUB, TYPE_F64, bld.getSSA(8),
> + bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), two, guess),
> + bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), input,
> + bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), guess, guess)));
> + guess = bld.mkOp2v(OP_SUB, TYPE_F64, bld.getSSA(8),
> +...
2015 Feb 23
0
[PATCH 2/2] nvc0/ir: improve precision of double RCP/RSQ results
...son steps
+ if (i->op == OP_RCP) {
+ // RCP: x_{n+1} = 2 * x_n - input * x_n^2
+ Value *two = bld.getSSA(8);
+
+ bld.mkCvt(OP_CVT, TYPE_F64, two, TYPE_F32, bld.loadImm(NULL, 2.0f));
+
+ guess = bld.mkOp2v(OP_SUB, TYPE_F64, bld.getSSA(8),
+ bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), two, guess),
+ bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), input,
+ bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), guess, guess)));
+ guess = bld.mkOp2v(OP_SUB, TYPE_F64, bld.getSSA(8),
+...
2015 Feb 23
0
[Mesa-dev] [PATCH 2/2] nvc0/ir: improve precision of double RCP/RSQ results
...x_{n+1} = 2 * x_n - input * x_n^2
>> + Value *two = bld.getSSA(8);
>> +
>> + bld.mkCvt(OP_CVT, TYPE_F64, two, TYPE_F32, bld.loadImm(NULL, 2.0f));
>> +
>> + guess = bld.mkOp2v(OP_SUB, TYPE_F64, bld.getSSA(8),
>> + bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), two, guess),
>> + bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), input,
>> + bld.mkOp2v(OP_MUL, TYPE_F64, bld.getSSA(8), guess, guess)));
>> + guess = bld.mkOp2v(OP_SUB, TYPE_F64, bld.getSSA(8),...
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
...ruction *insn)
break;
case OP_ADD:
case OP_SUB:
- if (isFloatType(insn->dType))
+ if (insn->dType == TYPE_F64)
+ emitDADD(insn);
+ else if (isFloatType(insn->dType))
emitFADD(insn);
else
emitUADD(insn);
break;
case OP_MUL:
- if (isFloatType(insn->dType))
+ if (insn->dType == TYPE_F64)
+ emitDMUL(insn);
+ else if (isFloatType(insn->dType))
emitFMUL(insn);
else
emitUMUL(insn);
break;
case OP_MAD:
case OP_FMA:
- if (isFloatType(insn->dTyp...
2016 Sep 30
2
[PATCH v2] nv50/ir: constant fold OP_SPLIT
...bld.setPosition(i, false);
+ for (int8_t d = 0; i->defExists(d); ++d) {
+ bld.mkMov(i->getDef(d), bld.mkImm(val & ((1 << shift) - 1)), type);
+ val >>= shift;
+ }
+ delete_Instruction(prog, i);
+ }
+ }
+ break;
case OP_MUL:
if (i->dType == TYPE_F32)
tryCollapseChainedMULs(i, s, imm0);
--
2.10.0
2016 Sep 27
2
[PATCH] nv50/ir: constant fold OP_SPLIT
...? TYPE_U8 : TYPE_S8;
+ }
+ if (type != TYPE_NONE) {
+ bld.mkMov(i->getDef(0), bld.mkImm(imm0.reg.data.u64 >> shift), type);
+ bld.mkMov(i->getDef(1), bld.mkImm(imm0.reg.data.u64), type);
+ delete_Instruction(prog, i);
+ }
+ }
+ break;
case OP_MUL:
if (i->dType == TYPE_F32)
tryCollapseChainedMULs(i, s, imm0);
--
2.10.0
2016 Sep 30
2
[PATCH] nv50/ir: constant fold OP_SPLIT
....mkMov(def, val,
>>type<<), where you always would use TYPE_U32. Not sure if that is
what we want... other than that that, shorten it like this would be nice!
>
>> + delete_Instruction(prog, i);
>> + }
>> + }
>> + break;
>> case OP_MUL:
>> if (i->dType == TYPE_F32)
>> tryCollapseChainedMULs(i, s, imm0);
>> --
>> 2.10.0
>>
>> _______________________________________________
>> Nouveau mailing list
>> Nouveau at lists.freedesktop.org
>> https://lists.freedes...
2015 Jan 04
0
[PATCH] nv50/ir: Add sat modifier for mul
...llium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -84,7 +84,7 @@ static const struct opProperties _initProps[] =
// neg abs not sat c[] s[], a[], imm
{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_SUB, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
- { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
+ { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constr...
2014 Jun 23
2
[Mesa-dev] [PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions
Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> writes:
> Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
> After folding, make sure that it is cleared
>
> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
> Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.1 10.2" <mesa-stable at lists.freedes...
2014 Jun 03
6
[PATCH v3 0/4] Constant folding of new Instructions
Yet another try for constant folding of Instructions for nvc0.
Please Review this again! (Hopefully the last time ;-) )
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant
2014 Jun 03
8
[PATCH v2 0/4] Constant folding of new Instructions
And another try for constant folding of Instructions for nvc0.
Please Review this!
Thanks,
Tobias Klausmann
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant expressions
2014 May 18
1
[PATCH 1/2] nv50/ir: fix s32 x s32 -> high s32 multiply logic
...001 + fffe0001
+//
+// Note that this sort of splitting doesn't work for signed values, so we
+// compute the sign on those manually and then perform an unsigned multiply.
static bool
expandIntegerMUL(BuildUtil *bld, Instruction *mul)
{
const bool highResult = mul->subOp == NV50_IR_SUBOP_MUL_HIGH;
- DataType fTy = mul->sType; // full type
- DataType hTy;
+ DataType fTy; // full type
+ switch (mul->sType) {
+ case TYPE_S32: fTy = TYPE_U32; break;
+ case TYPE_S64: fTy = TYPE_U64; break;
+ default: fTy = mul->sType; break;
+ }
+
+ DataType hTy; // half type...
2016 Sep 28
0
[PATCH] nv50/ir: constant fold OP_SPLIT
...bld.mkMov(i->getDef(d), bld.mkImm(val & ((1 << shift) - 1));
val >>= shift;
}
I think this will account for every case, and with a lot less
special-casing. What do you think?
> + delete_Instruction(prog, i);
> + }
> + }
> + break;
> case OP_MUL:
> if (i->dType == TYPE_F32)
> tryCollapseChainedMULs(i, s, imm0);
> --
> 2.10.0
>
> _______________________________________________
> Nouveau mailing list
> Nouveau at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/nouveau
2016 Sep 30
0
[PATCH] nv50/ir: constant fold OP_SPLIT
...ten it like this would be nice!
pah-shaw :(
typeOfSize(shift / 2, isFloatType(i->dType), isSignedType(i->dType))
How's that :p
>
>
>>
>>> + delete_Instruction(prog, i);
>>> + }
>>> + }
>>> + break;
>>> case OP_MUL:
>>> if (i->dType == TYPE_F32)
>>> tryCollapseChainedMULs(i, s, imm0);
>>> --
>>> 2.10.0
>>>
>>> _______________________________________________
>>> Nouveau mailing list
>>> Nouveau at lists.freedesktop.or...
2016 Sep 30
0
[PATCH v2] nv50/ir: constant fold OP_SPLIT
...t8_t d = 0; i->defExists(d); ++d) {
> + bld.mkMov(i->getDef(d), bld.mkImm(val & ((1 << shift) - 1)), type);
1ULL
> + val >>= shift;
> + }
> + delete_Instruction(prog, i);
> + }
> + }
> + break;
> case OP_MUL:
> if (i->dType == TYPE_F32)
> tryCollapseChainedMULs(i, s, imm0);
> --
> 2.10.0
>
> _______________________________________________
> Nouveau mailing list
> Nouveau at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/nouveau
2014 May 29
0
[PATCH 1/4] nvc0/ir: clear subop when folding constant expressions
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/...
2014 Jun 03
0
[PATCH v2 1/4] nvc0/ir: clear subop when folding constant expressions
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/...
2014 Jun 03
0
[PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
1 file c...
2014 Jun 23
0
[Mesa-dev] [PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions
On Mon, Jun 23, 2014 at 7:25 PM, Carl Worth <cworth at cworth.org> wrote:
> Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> writes:
>> Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
>> After folding, make sure that it is cleared
>>
>> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
>> Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
> Cc: "10.1 10.2" <mesa-st...