Displaying 6 results from an estimated 6 matches for "op_floor".
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__floor
2014 Nov 18
2
[PATCH] nv50/ir: saturate FRC result to avoid completely bogus values
...-- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -2512,7 +2512,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
src0 = fetchSrc(0, c);
val0 = getScratch();
mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
- mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
+ mkOp2(OP_SUB, TYPE_F32, val0, src0, val0);
+ mkOp1(OP_SAT, TYPE_F32, dst0[c], val0);
}
break;
case TGSI_OPCODE_ROUND:
--
2.0.4
2014 Nov 18
2
[Mesa-dev] [PATCH] nv50/ir: saturate FRC result to avoid completely bogus values
..._ir_from_tgsi.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>> @@ -2512,7 +2512,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>> src0 = fetchSrc(0, c);
>> val0 = getScratch();
>> mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
>> - mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
>> + mkOp2(OP_SUB, TYPE_F32, val0, src0, val0);
>> + mkOp1(OP_SAT, TYPE_F32, dst0[c], val0);
>> }
>> break;
>> case TGSI_OPCODE_ROUND:
>>
&g...
2014 Nov 18
1
[Mesa-dev] [PATCH] nv50/ir: saturate FRC result to avoid completely bogus values
...c/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>> @@ -2512,7 +2512,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>> src0 = fetchSrc(0, c);
>>>> val0 = getScratch();
>>>> mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
>>>> - mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
>>>> + mkOp2(OP_SUB, TYPE_F32, val0, src0, val0);
>>>> + mkOp1(OP_SAT, TYPE_F32, dst0[c], val0);
>>>> }
>>>> break;
>&g...
2014 Nov 18
0
[Mesa-dev] [PATCH] nv50/ir: saturate FRC result to avoid completely bogus values
...nouveau/codegen/nv50_ir_from_tgsi.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> @@ -2512,7 +2512,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
> src0 = fetchSrc(0, c);
> val0 = getScratch();
> mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
> - mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
> + mkOp2(OP_SUB, TYPE_F32, val0, src0, val0);
> + mkOp1(OP_SAT, TYPE_F32, dst0[c], val0);
> }
> break;
> case TGSI_OPCODE_ROUND:
>
I don't understand the m...
2014 Nov 18
0
[Mesa-dev] [PATCH] nv50/ir: saturate FRC result to avoid completely bogus values
...t;>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>> @@ -2512,7 +2512,8 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>> src0 = fetchSrc(0, c);
>>> val0 = getScratch();
>>> mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
>>> - mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
>>> + mkOp2(OP_SUB, TYPE_F32, val0, src0, val0);
>>> + mkOp1(OP_SAT, TYPE_F32, dst0[c], val0);
>>> }
>>> break;
>>> case TGSI_O...
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++-
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index dfb093c..e38a3b8 100644
---