search for: oneinit

...reliminary DMA mask based on the MMU device 'dma_bits' property (patch #1), and postpone mapping the scratch pages to the respective FB .init() hooks. (#2 and #3) v5: move setting of preliminary DMA mask to nvkm_device_pci_new() (#1) move allocation and DMA mapping of scratch pages to .oneinit hooks (#2, #3) v4: split and move dma_set_mask to probe hook (Alexander) v3: rework code to get rid of DMA_ERROR_CODE references, which is not defined on all architectures v2: replace incorrect comparison of dma_addr_t type var against NULL Ard Biesheuvel (3): drm/nouveau: set streaming DMA...

...ions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c index 65c99d948b686..ae47eabd5d0bd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c @@ -359,7 +359,7 @@ nvkm_disp_oneinit(struct nvkm_engine *engine) if (ret) return ret; - if (disp->func->oneinit) { + if (disp->func && disp->func->oneinit) { ret = disp->func->oneinit(disp); if (ret) return ret; @@ -461,8 +461,10 @@ nvkm_disp_new_(const struct nvkm_disp_func *func, struct...

...'dma_bits' >> property (patch #1), and postpone mapping the scratch pages to the respective >> FB .init() hooks. (#2 and #3) >> >> v5: move setting of preliminary DMA mask to nvkm_device_pci_new() (#1) >> move allocation and DMA mapping of scratch pages to .oneinit hooks (#2, #3) >> v4: split and move dma_set_mask to probe hook (Alexander) >> v3: rework code to get rid of DMA_ERROR_CODE references, which is not >> defined on all architectures >> v2: replace incorrect comparison of dma_addr_t type var against NULL >> >>...

...d on the MMU device 'dma_bits' > property (patch #1), and postpone mapping the scratch pages to the respective > FB .init() hooks. (#2 and #3) > > v5: move setting of preliminary DMA mask to nvkm_device_pci_new() (#1) > move allocation and DMA mapping of scratch pages to .oneinit hooks (#2, #3) > v4: split and move dma_set_mask to probe hook (Alexander) > v3: rework code to get rid of DMA_ERROR_CODE references, which is not > defined on all architectures > v2: replace incorrect comparison of dma_addr_t type var against NULL > > Ard Biesheuvel (3): >...

...a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c > index 65c99d948b686..ae47eabd5d0bd 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c > @@ -359,7 +359,7 @@ nvkm_disp_oneinit(struct nvkm_engine *engine) > if (ret) > return ret; > > - if (disp->func->oneinit) { > + if (disp->func && disp->func->oneinit) { > ret = disp->func->oneinit(disp); > if (ret) >...

...'dma_bits' >> property (patch #1), and postpone mapping the scratch pages to the respective >> FB .init() hooks. (#2 and #3) >> >> v5: move setting of preliminary DMA mask to nvkm_device_pci_new() (#1) >> move allocation and DMA mapping of scratch pages to .oneinit hooks (#2, #3) >> v4: split and move dma_set_mask to probe hook (Alexander) >> v3: rework code to get rid of DMA_ERROR_CODE references, which is not >> defined on all architectures >> v2: replace incorrect comparison of dma_addr_t type var against NULL >> >>...

After observing random crashes on Tegra devices when patch "fb/gf100: defer DMA mapping of scratch page to oneinit() hook" was applied, I noticed that moving the 100c10 page allocation to the oneinit() hook resulted in that page being now allocated for Tegra as well, and accesses be made to members of gf100_fb which were not accessible because gk20a_fb_new() called nvkm_fb_new_() directly. This is fixed b...

...rm/nouveau/mmu/nv04-nv4x: move global vmm to nvkm_mmu") 11fc017dfb1e ("drm/nouveau/kms/nv50: prepare for double-buffered LUTs") 1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into their own source files") 269fe32d3343 ("drm/nouveau/bar: swap oneinit/init ordering, and rename bar3 to bar2") 30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath dispnv50/") 34508f9d260c ("drm/nouveau/kms/nv50-: determine MST support from DP Info Table") 5b17f3624efa ("drm/nouveau/mmu/nv04: implement vmm on top of new...

...; + +static int +gf117_volt_speedo_read(struct nvkm_volt *volt) +{ + struct nvkm_device *device = volt->subdev.device; + struct nvkm_fuse *fuse = device->fuse; + + if (!fuse) + return -EINVAL; + + return nvkm_fuse_read(fuse, 0x3a8); +} + +static const struct nvkm_volt_func +gf117_volt = { + .oneinit = gf100_volt_oneinit, + .vid_get = nvkm_voltgpio_get, + .vid_set = nvkm_voltgpio_set, + .speedo_read = gf117_volt_speedo_read, +}; + +int +gf117_volt_new(struct nvkm_device *device, int index, struct nvkm_volt **pvolt) +{ + struct nvkm_volt *volt; + int ret; + + ret = nvkm_volt_new_(&gf117_volt...

...ruct nvkm_fb *fb = subdev->device->fb; + struct nvkm_therm *therm = subdev->device->therm; int ret = 0, i; s64 time; if (!engine->usecount) { nvkm_trace(subdev, "init skipped, engine has no users\n"); - return ret; + goto finish; } if (engine->func->oneinit && !engine->subdev.oneinit) { @@ -123,6 +132,15 @@ nvkm_engine_init(struct nvkm_subdev *subdev) for (i = 0; fb && i < fb->tile.regions; i++) nvkm_engine_tile(engine, i); + +finish: + if (!ret) { + int gate_idx = therm->clkgate_engine(therm, subdev->index); + +...

...BIOS_EXTDEV_INA219: + nvkm_iccsense_ina2x9_config(iccsense, sensor); + break; + case NVBIOS_EXTDEV_INA3221: + nvkm_iccsense_ina3221_config(iccsense, sensor); + break; + default: + break; + } +} + int nvkm_iccsense_read_all(struct nvkm_iccsense *iccsense) { @@ -257,8 +314,19 @@ nvkm_iccsense_oneinit(struct nvkm_subdev *subdev) return 0; } +static int +nvkm_iccsense_init(struct nvkm_subdev *subdev) +{ + struct nvkm_iccsense *iccsense = nvkm_iccsense(subdev); + struct nvkm_iccsense_sensor *sensor; + list_for_each_entry(sensor, &iccsense->sensors, head) + nvkm_iccsense_sensor_config(...

...x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8); - nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8); -} - +/* GK20A's FB is similar to GF100's, but without the ability to allocate VRAM */ static const struct nvkm_fb_func gk20a_fb = { + .dtor = gf100_fb_dtor, .oneinit = gf100_fb_oneinit, - .init = gk20a_fb_init, + .init = gf100_fb_init, .init_page = gf100_fb_init_page, + .intr = gf100_fb_intr, .memtype_valid = gf100_fb_memtype_valid, }; -- 2.10.0

...gt; >         if (!engine->usecount) { > >                 nvkm_trace(subdev, "init skipped, engine has no > > users\n"); > > -               return ret; > > +               goto finish; > >         } > > > >         if (engine->func->oneinit && !engine->subdev.oneinit) { > > @@ -123,6 +132,15 @@ nvkm_engine_init(struct nvkm_subdev *subdev) > > > >         for (i = 0; fb && i < fb->tile.regions; i++) > >                 nvkm_engine_tile(engine, i); > > + > > +finish: > &gt...

...ruct nvkm_fb *fb = subdev->device->fb; + struct nvkm_therm *therm = subdev->device->therm; int ret = 0, i; s64 time; if (!engine->usecount) { nvkm_trace(subdev, "init skipped, engine has no users\n"); - return ret; + goto finish; } if (engine->func->oneinit && !engine->subdev.oneinit) { @@ -123,6 +128,11 @@ nvkm_engine_init(struct nvkm_subdev *subdev) for (i = 0; fb && i < fb->tile.regions; i++) nvkm_engine_tile(engine, i); + +finish: + if (!ret) + nvkm_therm_clkgate_engine(therm, subdev->index, true); + return re...

...OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include "gf100.h" + +static const struct nvkm_fb_func +gp10b_fb = { + .dtor = gf100_fb_dtor, + .oneinit = gf100_fb_oneinit, + .init = gm200_fb_init, + .init_page = gm200_fb_init_page, + .intr = gf100_fb_intr, + .memtype_valid = gf100_fb_memtype_valid, +}; + +int +gp10b_fb_new(struct nvkm_device *device, int index, struct nvkm_fb **pfb) +{ + return gf100_fb_new_(&gp10b_fb, device, index, pfb); +}...

...0 }, > + { gk104_fb_clkgate_blcg_init_vm_0 }, > + { gk104_fb_clkgate_blcg_init_main_0 }, > + { gk104_fb_clkgate_blcg_init_bcast_0 }, > + {} > +}; > + > +static const struct nvkm_fb_func > +gk110_fb = { > + .dtor = gf100_fb_dtor, > + .oneinit = gf100_fb_oneinit, > + .init = gf100_fb_init, > + .init_page = gf100_fb_init_page, > + .intr = gf100_fb_intr, > + .ram_new = gk104_ram_new, > + .default_bigpage = 17, > + .clkgate_pack = gk110_fb_clkgate_pack, > +}; > + > +int > +gk...

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

...c variable also describes clearly > what > LS firmwares are to be loaded and how. > > Alexandre Courbot (8): > core: constify nv*_printk macros > core: add falcon library > secboot: use falcon library's IMEM/DMEM loading functions > secboot: rename init() hook to oneinit() > secboot: move ACR building logic into own source files > secboot: remove fixup_hs_desc hook > secboot: add low-secure firmware hooks > secboot: generate HS BL descriptor in hook > > drm/nouveau/include/nvkm/core/client.h | 4 +- > drm/nouveau/include/nvk...

...int ret = 0, i; > s64 time; > > if (!engine->usecount) { > nvkm_trace(subdev, "init skipped, engine has no users\n"); > - return ret; > + goto finish; > } > > if (engine->func->oneinit && !engine->subdev.oneinit) { > @@ -123,6 +132,15 @@ nvkm_engine_init(struct nvkm_subdev *subdev) > > for (i = 0; fb && i < fb->tile.regions; i++) > nvkm_engine_tile(engine, i); > + > +finish: > + if (!ret) { > +...

I've splitted my big series between the part which actually fixes the engine reclocking bits and the part handling voltage/clock updates on temperature change, so that the more reviewed parts can be merged in faster. This series fixes a lot of Engine reclocking issues found on Fermi, Kepler and all Maxwell generation GPUs. It does _not_ fix memory reclocking on Fermi. It mostly contains of