search for: omerbeg

Displaying 10 results from an estimated 10 matches for "omerbeg".

2012 Feb 24
3
[LLVMdev] CodeGen instructions and patterns
Is there a generic function that gives the machine instructions and their patterns given in the .td files of a backend specification ? or a subset which match a certain opcode ? otherwise how are the machine instructions being accessed/matched for instruction selection ? -Omer -------------- next part -------------- An HTML attachment was scrubbed... URL:
2011 Aug 15
0
[LLVMdev] Order of code generation
After enabling assertions and recompilation I still get this error. ~/bin/llvm$ llc -view-isel-dags t3.bc llc: Unknown command line argument '-view-isel-dags'. Try: 'llc -help' llc: Did you mean '-fast-isel-abort'? and I see the view-edge bundles option but get the following error. ~/bin/llvm$ llc -view-edge-bundles t3.bc Writing
2012 Feb 24
0
[LLVMdev] CodeGen instructions and patterns
Hi Omer, On Feb 24, 2012, at 8:46 AM, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ <omerbeg at gmail.com> wrote: > Is there a generic function that gives the machine instructions and their patterns given in the .td files of a backend specification ? > or a subset which match a certain opcode ? I'm not aware of any dump utility functions to display that information concisely...
2012 Feb 24
0
[LLVMdev] CodeGen instructions and patterns
(readding cc llvmdev) On Feb 24, 2012, at 11:46 AM, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ <omerbeg at gmail.com> wrote: > > > otherwise how are the machine instructions being accessed/matched for instruction selection ? > > > > Have a look at the code in SelectionDAGISel. > > > I am looking at the ARM backend. > In specific, the instruction selection. &g...
2012 Mar 31
1
[LLVMdev] LLVM Instruction selection matcher
I have a few questions about matching in the selector. 1. Why does the size of the MatcherTable greatly exceed the number of patterns defined in the target description? If it simply contains all the variants of the patterns then what is the encoding of these entries ? 2. Is there a simple way to extract the root opcode of a pattern from the MatcherTable entry ? 3. I believe the entries in the
2011 Aug 15
2
[LLVMdev] Order of code generation
On 15/08/11 13:12, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ wrote: > How do I enable the assertions when building ? > I am using 2.9, the current version, and when I use the standard build llc does > not give me the view-*-dags options. Configure with --enable-assertions Ciao, Duncan. > > -Omer > > On Sat, Aug 13, 2011 at 1:50 AM, Duncan Sands <baldrick at free.fr > <mailto:baldrick at
2012 Apr 12
1
[LLVMdev] Instruction selector option in clang
In llc I can change the selector using -fast-isel. how can I do this in clang ? -Omer -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120411/3efacf9e/attachment.html>
2011 Aug 12
2
[LLVMdev] Order of code generation
I need help with visualizing graphs before and after instruction selection. The llc options listed in the docs do not work as specified. -Omer 2011/8/8 Rafael Ávila de Espíndola <rafael.espindola at gmail.com> > On 08/06/2011 02:40 AM, Sanjoy Das wrote: > > Hi! > > > > I have a DAG (attached), which, according to me, should result in the > > code for
2011 Aug 15
0
[LLVMdev] Order of code generation
How do I enable the assertions when building ? I am using 2.9, the current version, and when I use the standard build llc does not give me the view-*-dags options. -Omer On Sat, Aug 13, 2011 at 1:50 AM, Duncan Sands <baldrick at free.fr> wrote: > On 13/08/11 00:01, Cameron Zwarich wrote: > > They do work if you have GraphViz binaries in your path when you > configure LLVM.
2011 Nov 16
0
[LLVMdev] LLVM 3.0 release notes ARM Target
what do you mean by "more optimal instructions" ? -omer On Wed, Nov 16, 2011 at 1:28 AM, Joe Abbey <jabbey at arxan.com> wrote: > I've done a first pass over the past 6 months of changes and some notable > things stood out: > > * The ARM backend has reworked Set Jump Long Jump EH Lowering. > * The ARM backend includes improved support for Cortex-M > *