search for: olution

The hardware supports either size. Also add checks to ensure that only these two sizes may be used for supplying a LUT. Finally, experimental evidence suggests you can't mix sizes for degamma and gamma. Disallow this as well. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Note that all the gv100+ changes are purely speculative. Tested on a GK208 with 8- and 10-bpc formats

The hardware supports either size. Also add checks to ensure that only these two sizes may be used for supplying a LUT. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Only tested on G84 and GK208. The GV100+ is entirely untested. With the fixed modetest tool, setting ilut and olut sizes to different quantities seems to work out OK, across a range of formats (XR24, XB30, XB4H).

Product: Dovecot Vendor: OX Software GmbH Internal reference: DOV-2964 (Bug ID) Vulnerability type: CWE-120 Vulnerable version: 2.0.14 - 2.3.5 Vulnerable component: fts, pop3-uidl-plugin Report confidence: Confirmed Researcher credits: Found in internal testing Solution status: Fixed by Vendor Fixed version: 2.3.5.1, 2.2.36.3 Vendor notification: 2019-02-05 Solution date: 2019-03-21 Public disclosure: 2019-03-28 CVE reference: CVE-2019-7524 CVSS: 3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H/E:P/RL:O/RC:C (8.8) ? Vulnerability Details: When reading FTS or POP3-UIDL head...

Product: Dovecot Vendor: OX Software GmbH Internal reference: DOV-2964 (Bug ID) Vulnerability type: CWE-120 Vulnerable version: 2.0.14 - 2.3.5 Vulnerable component: fts, pop3-uidl-plugin Report confidence: Confirmed Researcher credits: Found in internal testing Solution status: Fixed by Vendor Fixed version: 2.3.5.1, 2.2.36.3 Vendor notification: 2019-02-05 Solution date: 2019-03-21 Public disclosure: 2019-03-28 CVE reference: CVE-2019-7524 CVSS: 3.0/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H/E:P/RL:O/RC:C (8.8) ? Vulnerability Details: When reading FTS or POP3-UIDL head...

From: Ben Skeggs <bskeggs at redhat.com> [ Upstream commit 1e339ab2ac3c769c1b06b9fb7d532f8495ebc56d ] On Turing, an input LUT is required to transform inputs in fixed-point formats to FP16 for the internal display pipe. We provide an identity mapping whenever a window is enabled for this reason. HW has error checks to ensure when the input is already FP16, that the input LUT is also

From: Ben Skeggs <bskeggs at redhat.com> [ Upstream commit 1e339ab2ac3c769c1b06b9fb7d532f8495ebc56d ] On Turing, an input LUT is required to transform inputs in fixed-point formats to FP16 for the internal display pipe. We provide an identity mapping whenever a window is enabled for this reason. HW has error checks to ensure when the input is already FP16, that the input LUT is also

We'll be rolling back more things in this function, and the way it's structured is a bit confusing. So, let's clean this up a bit and just unroll in the event of failure. Signed-off-by: Lyude Paul <lyude at redhat.com> --- drivers/gpu/drm/nouveau/dispnv50/head.c | 33 +++++++++++++++++-------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git

We'll be rolling back more things in this function, and the way it's structured is a bit confusing. So, let's clean this up a bit and just unroll in the event of failure. Signed-off-by: Lyude Paul <lyude at redhat.com> --- drivers/gpu/drm/nouveau/dispnv50/head.c | 33 +++++++++++++++++-------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git

We'll be rolling back more things in this function, and the way it's structured is a bit confusing. So, let's clean this up a bit and just unroll in the event of failure. Signed-off-by: Lyude Paul <lyude at redhat.com> --- drivers/gpu/drm/nouveau/dispnv50/head.c | 33 +++++++++++++++++-------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git

On 3/28/2019 7:42 AM, Aki Tuomi via dovecot wrote: > olution: > Operators should update to the latest Patch Release. The only workaround > is to disable FTS and pop3-uidl plugin. Hi Aki, thanks for the CVE.? For quick mitigation, can you confirm how to disable these plugins and what they provide?? We'd like to assess if we are using them while we...

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...dovecot@dovecot.org</a>> wrote: </div> <div> <br> </div> <div> <br> </div> <div> On 3/28/2019 7:42 AM, Aki Tuomi via dovecot wrote: </div> <blockquote type="cite"> <div> olution: </div> <div> Operators should update to the latest Patch Release. The only workaround </div> <div> is to disable FTS and pop3-uidl plugin. </div> </blockquote> <div> Hi Aki, thanks for the CVE. For quick mitigation,...

The base917c_format isn't exported, so make it static to avoid the following warning: drivers/gpu/drm/nouveau/dispnv50/base917c.c:26:1: warning: symbol 'base917c_format' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks at codethink.co.uk> --- drivers/gpu/drm/nouveau/dispnv50/base917c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Atomic checks should never modify anything outside of the state that they're passed in. Unfortunately this appears to be exactly what we're doing in nv50_msto_atomic_check() where we update mstc->pbn every time the function is called. This hasn't caused any bugs yet, but it needs to be fixed in order to ensure that when committing an artificially duplicated state (like during system

While we're not quite ready yet to add support for flexible wndw mappings, we are going to need to at least keep track of the static wndw mappings we're currently using in each head's atomic state. We'll likely use this in the future to implement real flexible window mapping, but the primary reason we'll need this is for CRC support. See: on nvidia hardware, each CRC entry in

While we're not quite ready yet to add support for flexible wndw mappings, we are going to need to at least keep track of the static wndw mappings we're currently using in each head's atomic state. We'll likely use this in the future to implement real flexible window mapping, but the primary reason we'll need this is for CRC support. See: on nvidia hardware, each CRC entry in

While we're not quite ready yet to add support for flexible wndw mappings, we are going to need to at least keep track of the static wndw mappings we're currently using in each head's atomic state. We'll likely use this in the future to implement real flexible window mapping, but the primary reason we'll need this is for CRC support. See: on nvidia hardware, each CRC entry in

This adds support on GF119:GV100 (exclusive) for CTM (aka CSC). Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- drivers/gpu/drm/nouveau/dispnv50/atom.h | 6 ++ drivers/gpu/drm/nouveau/dispnv50/base907c.c | 65 +++++++++++++++++++++ drivers/gpu/drm/nouveau/dispnv50/wndw.c | 13 +++++ drivers/gpu/drm/nouveau/dispnv50/wndw.h | 4 ++ 4 files changed, 88 insertions(+)

On the ThinkPad P71, we have one eDP connector exposed along with 5 DP connectors, resulting in a total of 11 TMDS encoders. Since the GPU on this system is also capable of MST, we create an additional 4 fake MST encoders for each DP port. Unfortunately, we also do this for the eDP port as well, resulting in: 1 eDP port: +1 TMDS encoder +4 DPMST encoders 5 DP ports: +2 TMDS