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...om this table. Thanks, Jyotsna -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Jyotsna Verma Sent: Tuesday, August 21, 2012 12:42 PM To: 'Jakob Stoklund Olesen' Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] TableGen related question for the Hexagon backend Sounds good. I've started adding TableGen backend support to emit relationship table into a .inc file. Hoping to finish it soon. Thanks for all your help. -Jyotsna -- Qualcomm Innovation...

Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: > On Sep 19, 2012, at 10:49 AM, <dag at cray.com> wrote: > >> Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: >> >> So if there are multiple values between r2 and r3 (r2.1, r2.2, etc.) I >> would just follow the chain...

...na -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Jyotsna Verma Sent: Tuesday, August 28, 2012 1:01 PM To: 'Jakob Stoklund Olesen' Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] TableGen backend support to express relations between instruction Hi Jakob, Here is the first draft of the patch to add TableGen backend support for the instruction mapping tables. Please take a look and let me know your suggestions. As of no...

...Anyone feel free to jump in via the mailing-list. TIA -- Evandro Menezes Austin, TX emenezes at codeaurora.org Qualcomm Innovation Center, Inc is a member of the Code Aurora Forum -------------- next part -------------- An embedded message was scrubbed... From: Jakob Stoklund Olesen <stoklund at 2pi.dk> Subject: Re: [LLVMdev] [RFC] Hexagon insn table refactoring Date: Mon, 13 Aug 2012 11:47:47 -0700 Size: 3124 URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120814/95e73c2b/attachment.eml> -------------- next part -------------- An embedded message was...

On May 17, 2010, at 6:21 PM, Chris Lattner wrote: > > On May 17, 2010, at 5:43 PM, Jakob Stoklund Olesen wrote: > >> As you may have noticed, I have been working on a fast register allocator in the last week. The new allocator is intended to replace the local allocator for debug builds. > > This is great work Jakob! What is required and when do you think you'll be killing off the...

On Aug 6, 2012, at 11:16 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > > The getNextOperandForReg() function isn't used anywhere, Should we remove it? -Jim

On Sep 19, 2012, at 4:02 PM, dag at cray.com wrote: > Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: > >> On Sep 19, 2012, at 10:49 AM, <dag at cray.com> wrote: >> >>> Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: >>> >>> So if there are multiple values between r2 and r3 (r2.1, r2.2, etc.) I >>&g...

Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: >> If we decide to spill r3, we call traceSiblingValue to find the original >> def (the load). After traceSiblingValue we have the load instruction to >> define r1 and the value number information for r3. We don't have the >> value i...

On Sat, Feb 26, 2011 at 01:07:39PM -0800, Jakob Stoklund Olesen wrote: > > On Feb 25, 2011, at 7:27 PM, Joerg Sonnenberger wrote: > > > I'm trying to add a X86 pattern to turn > > movl $-1, %eax > > into > > orl $-1, $eax > > Please make sure to measure the performance impact of doing this. You > are creating a...

Committed at r194269 Thanks Jakob ! Cheers, -- Arnaud On Fri, Nov 8, 2013 at 6:34 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote: > > On Nov 8, 2013, at 7:40 AM, Arnaud Allard de Grandmaison < > arnaud.adegm at gmail.com> wrote: > > > Based on discussions with Lang Hames and Jakob Stoklund Olesen at the > hacker's lab, and in the light of upcoming work on the PB...

Based on discussions with Lang Hames and Jakob Stoklund Olesen at the hacker's lab, and in the light of upcoming work on the PBQP register allocator, it was though that CalcSpillWeights does not need to be a pass. This change will enable to customize / tune the spill weight computation depending on the allocator. Update the documentation style while there...

On Oct 11, 2011, at 1:33 PM, David A. Greene wrote: > Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: > >> How about: > > foreach x = [...] > > I could do > > foreach x in [...] > > but that requires another keyword. Do we care? The syntax should be consistent with let expressions, even if the meaning is completely differen...

Jakob Stoklund Olesen <stoklund at 2pi.dk> writes: > On Nov 16, 2011, at 9:15 AM, David Greene wrote: > >> I'm working on some enhancements to rematerialization that I hope to >> contribute. > > What do you have in mind? Rematting more types of loads. >> /// getReMatImplicitUse...

On Thu, Aug 2, 2012 at 5:23 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > The problem is, this isn't really any better than having a large switch statement. You just moved the table into the .td file. > > You should be taking advantage of the instruction multiclasses so you don't have to maintain a full table of opcode...

Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote on 25.04.2013 18:58:05: > On Apr 25, 2013, at 4:44 AM, Ulrich Weigand <Ulrich.Weigand at de.ibm.com> wrote: > > > Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote on 24.04.2013 23:47:54: > > > >> I would like to add one more c...

Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote on 24.04.2013 23:47:54: > I would like to add one more case here: Fixed register operands. > > Some instructions, like x86's MUL and DIV, take operands in fixed > registers. Currently, we handle that with COPY instructions to and > from the fixed...

Hi @llvm, Am 08.03.2011 20:14, schrieb Jakob Stoklund Olesen: > Is that extra method getting called? What happens if you stick assert(0) in there? That won't work either (that is, the assert fires). In debug mode the MSVC lib tries to test the ordering of the sequence. And it uses the yielded predicate for this (which in this particular case is a ve...

On Dec 8, 2009, at 3:31 PM, Jakob Stoklund Olesen wrote: > > On Dec 8, 2009, at 11:33 AM, Evan Cheng wrote: > >> This caused a massive slow down to post-ra scheduler (llc -O3 on x86, -O2 on ARM). I'm going to revert it for now until it has been addressed. > > Probably caused by this member: > > /// KillIndice...

On Jul 22, 2011, at 11:44 PM, Jakob Stoklund Olesen wrote: > On Jul 22, 2011, at 10:29 PM, Bill Wendling wrote: > >> // Restrictions: >> >> There are several new invariants which will be enforced by the verifier: >> >> 1. A landing pad block is a basic block which is the unwind destination of an >> inv...

On 20.10.2010 05:00, Jakob Stoklund Olesen wrote: > On Oct 19, 2010, at 6:37 PM, Roland Scheidegger wrote: > >> Thanks for giving it a look! >> >> On 19.10.2010 23:21, Jakob Stoklund Olesen wrote: >>> On Oct 19, 2010, at 11:40 AM, Roland Scheidegger wrote: >>> >>>> So I saw that the c...