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Hi there, I have a question on the LLVM internals. Is it possible to dump an InstructionList (i.e. a (possibly) naively scheduled assembly) prior register allocation? Does LLVM use infinite (virtual) registers similar to MachSUIF? This is, of course, meant for a given target in contrast to MachSUIF that features the SUIFvm ISA as low-level IR and such a dump is possible at this point. Plus:

I could swear that I remember seeing some announcement somewhere that Zaptel now supported drop-and-insert across spans on a TE410P, but now I can't find it. Am I imagining this? We just got our TE410 up and running, and if we could cross-connect digital channels with it, I think we'd buy another one for the remote end (instead of using the T100P we have). Searching Google ("zaptel

Hi, once again, Problems with pciback and pci passthrough the system -------------------------------------------------------------------------------- DOMAIN0:~# lspci -tv -[0000:00]-+-00.0 nVidia Corporation nForce3 250Gb Host Bridge +-01.0 nVidia Corporation nForce3 250Gb LPC Bridge +-01.1 nVidia Corporation nForce 250Gb PCI System Management +-02.0