Displaying 20 results from an estimated 329 matches for "oclass".
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2014 Aug 24
0
[PATCH 1/3] subdev: add a pfuse subdev
...<subdev/gpio.h>
> #include <subdev/i2c.h>
> +#include <subdev/fuse.h>
> #include <subdev/clock.h>
> #include <subdev/therm.h>
> #include <subdev/mxm.h>
> @@ -62,6 +63,7 @@ gm100_identify(struct nouveau_device *device)
> device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
> device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
> device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
> + device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
> device->oclass[NVDEV_SUB...
2014 Aug 24
8
[PATCH 1/3] subdev: add a pfuse subdev
...#include <subdev/bus.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
+#include <subdev/fuse.h>
#include <subdev/clock.h>
#include <subdev/therm.h>
#include <subdev/mxm.h>
@@ -62,6 +63,7 @@ gm100_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
+ device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve...
2014 Sep 08
1
[PATCH] gpio: rename g92 class to g94
...nv94.c
diff --git a/nvkm/engine/device/nv50.c b/nvkm/engine/device/nv50.c
index ca265fe..96f568d 100644
--- a/nvkm/engine/device/nv50.c
+++ b/nvkm/engine/device/nv50.c
@@ -145,7 +145,7 @@ nv50_identify(struct nouveau_device *device)
case 0x92:
device->cname = "G92";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
- device->oclass[NVDEV_SUBDEV_GPIO ] = nv92_gpio_oclass;
+ device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &g80_fus...
2014 May 12
1
[PATCH 1/2] device/nvf1: add support for 0xf1 (gk110b)
...+++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
index 964c183..6e72f9c 100644
--- a/nvkm/engine/device/nve0.c
+++ b/nvkm/engine/device/nve0.c
@@ -208,6 +208,41 @@ nve0_identify(struct nouveau_device *device)
#endif
device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
break;
+ case 0xf1:
+ device->cname = "GK110B";
+ device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
+ device->oclass[NVDEV_SUBDEV_GPIO ] = &nve0_gpio_oclass;
+ device->oclass[NVDEV_SUBDEV_I2C ] =...
2014 Dec 03
0
[PATCH] Add support for GK208B, resolves bug 86935
...core/engine/device/nve0.c b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
index b1b2e48..975cfab 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
@@ -248,6 +248,39 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
break;
+ case 0x106:
+ device->cname = "GK208B";
+ device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
+ device->oclass[NVDEV_SUBDEV_GPIO ] =...
2015 Feb 21
0
[PATCH] device/gm100: Basic GM206 bring up (as copy of GM204)
...ions(+)
diff --git a/drm/nouveau/nvkm/engine/device/gm100.c b/drm/nouveau/nvkm/engine/device/gm100.c
index 539561e..108d048 100644
--- a/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drm/nouveau/nvkm/engine/device/gm100.c
@@ -142,6 +142,49 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
#endif
break;
+ case 0x126:
+ device->cname = "GM206";
+ device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
+ device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
+ device->oclass[NVDEV_SUBDEV_I2C ] =...
2013 Sep 05
6
[PATCH 1/7] drm/nouveau: remove prototype for non-existent nouveau_connector_bpp
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
drivers/gpu/drm/nouveau/nouveau_connector.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h b/drivers/gpu/drm/nouveau/nouveau_connector.h
index 6e399aa..4cefce3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.h
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.h
@@ -107,7 +107,4
2013 Jun 23
0
[PATCH v2] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
...au_xtensa_wr32(struct nouveau_object *object, u64 addr, u32 data)
+{
+ struct nouveau_xtensa *xtensa = (void *)object;
+ nv_wr32(xtensa, xtensa->addr + addr, data);
+}
+
+int
+_nouveau_xtensa_engctx_ctor(struct nouveau_object *parent,
+ struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 size,
+ struct nouveau_object **pobject)
+{
+ struct nouveau_engctx *engctx;
+ int ret;
+
+ ret = nouveau_engctx_create(parent, engine, oclass, NULL,
+ 0x10000, 0x1000,
+ NVOBJ_FLAG_ZERO_ALLOC, &engctx);
+ *pobject = nv_object(engctx);
+ return ret;...
2014 Feb 05
2
[PATCH 1/3] drm/nv4c/mc: nv4x igp's have a different msi rearm register
.../core/engine/device/nv40.c b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
index 1b653dd..08b8859 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
@@ -311,7 +311,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
- device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
+ device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc...
2017 May 04
1
[bug report] drm/nouveau/object: merge with handle
...ning:
drivers/gpu/drm/nouveau/nvkm/core/object.c:298 nvkm_object_ctor()
warn: 'object->engine' is an error pointer or valid
drivers/gpu/drm/nouveau/nvkm/core/object.c
283 void
284 nvkm_object_ctor(const struct nvkm_object_func *func,
285 const struct nvkm_oclass *oclass, struct nvkm_object *object)
286 {
287 object->func = func;
288 object->client = oclass->client;
289 object->engine = nvkm_engine_ref(oclass->engine);
290 object->oclass = oclass->base.oclass;
291 object-&g...
2015 Jul 23
4
[PATCH] nouveau: nv46: Change mc subdev oclass from nv44 to nv4c
MSI interrupts appear to not work for nv46 based cards. Change the mc
subdev oclass for these cards from nv44 to nv4c, the nv4c mc code is
identical to the nv44 mc code except that it does not use msi
(it does not define a msi_rearm callback).
BugLink: https://bugs.freedesktop.org/show_bug.cgi?id=90435
Signed-off-by: Hans de Goede <hdegoede at redhat.com>
---
drivers/gpu/d...
2013 Sep 08
5
[PATCH 1/5] drm/nv31/mpeg: no need to set compat mode differently for nv44 gr
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c
index c190043..5c54aa1 100644
--- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c
+++
2014 Mar 26
1
[PATCH 12/12] drm/nouveau: support for probing GK20A
...eau/core/engine/device/nve0.c
> index 987edbc30a09..8509dd57de1f 100644
> --- a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
> +++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
> @@ -156,6 +156,26 @@ nve0_identify(struct nouveau_device *device)
> device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
> device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
> break;
> + case 0xea:
> + device->cname = "GK20A";
> + device->oclass[NVDEV_SUBDEV_M...
2014 May 12
0
[PATCH 2/2] device/nvf0: enable video decoding engines on gk110/gk208
.../device/nve0.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
index 6e72f9c..459099e 100644
--- a/nvkm/engine/device/nve0.c
+++ b/nvkm/engine/device/nve0.c
@@ -201,11 +201,9 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
-#if 0
device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
device->oclass[NVDEV_ENGINE_VP...
2014 Jan 01
2
Possible 3.13-rc nouveau regression with GT 560 Ti
...introduced
>> it.
> Any chance you might mmiotrace the blob (version 325 or later) to see
> which registers it fiddles with? Or alternatively, if you have a NVCE
> card (you never did end up providing the logs which would have made
> that apparent), could you try replacing nvc3_mc_oclass with
> nvc0_mc_oclass for the 0xce case in
> drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without
> the MSI disabling.) The switch has already been made for NVC8 in
> 0bae1d61c75 -- perhaps there are more "odd" ones.
>
> -ilia
>
Fails exactly the sa...
2014 Jan 02
3
Possible 3.13-rc nouveau regression with GT 560 Ti
...> Any chance you might mmiotrace the blob (version 325 or later) to see
>>> which registers it fiddles with? Or alternatively, if you have a NVCE
>>> card (you never did end up providing the logs which would have made
>>> that apparent), could you try replacing nvc3_mc_oclass with
>>> nvc0_mc_oclass for the 0xce case in
>>> drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without
>>> the MSI disabling.) The switch has already been made for NVC8 in
>>> 0bae1d61c75 -- perhaps there are more "odd" ones.
>>>...
2014 Mar 24
0
[PATCH 12/12] drm/nouveau: support for probing GK20A
...e/device/nve0.c b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
index 987edbc30a09..8509dd57de1f 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
@@ -156,6 +156,26 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
break;
+ case 0xea:
+ device->cname = "GK20A";
+ device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
+ device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_o...
2014 Nov 30
2
[PATCH] gf116: remove copy1 engine
.../engine/device/nvc0.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/nvkm/engine/device/nvc0.c b/nvkm/engine/device/nvc0.c
index cd05677..72a40f9 100644
--- a/nvkm/engine/device/nvc0.c
+++ b/nvkm/engine/device/nvc0.c
@@ -218,7 +218,6 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_COPY0 ] = &nvc0_copy0_oclass;
- device->oclass[NVDEV_ENGINE_COPY1 ] = &nvc0_copy1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv...
2014 Feb 13
2
[PATCH] nouveau: fix chipset checks for nv1a by using the oclass instead
.../nv10_context.c
@@ -63,7 +63,7 @@ nv10_use_viewport_zclear(struct gl_context *ctx)
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct gl_renderbuffer *depthRb = fb->Attachment[BUFFER_DEPTH].Renderbuffer;
- return context_chipset(ctx) < 0x17 &&
+ return context_eng3d(ctx)->oclass < NV17_3D_CLASS &&
!nctx->hierz.clear_blocked && depthRb &&
(_mesa_get_format_bits(depthRb->Format,
GL_DEPTH_BITS) >= 24);
@@ -184,7 +184,7 @@ nv10_clear(struct gl_context *ctx, GLbitfield buffers)
}
if ((buffers & BUFFER_BIT_DEPTH) &a...
2013 Jun 03
4
[PATCH] nouveau: Load firmware for BSP/VP engines on NV84-NV96, NVA0
...+29,10 @@
struct nv84_bsp_priv {
struct nouveau_engine base;
+ u32 *fw;
+ long fw_size;
+ struct nouveau_gpuobj *gpu_fw;
+ void *vm_gpu_fw;
};
/*******************************************************************************
@@ -37,6 +41,7 @@ struct nv84_bsp_priv {
static struct nouveau_oclass
nv84_bsp_sclass[] = {
+ { 0x74b0, &nouveau_object_ofuncs },
{},
};
@@ -44,11 +49,28 @@ nv84_bsp_sclass[] = {
* BSP context
******************************************************************************/
+static int
+nv84_bsp_engctx_ctor(struct nouveau_object *parent,
+ struct...