search for: ocelot

Hello All, I build source code of Ocelot[http://code.google.com/p/gpuocelot/]. It using LLVM dependency of Ocelot. llvm-config get cppflags represent as below in order to build with Ocelot. ./llvm-config --cppflags -I/home/chatsiri/workspacecpp/llvm/include -I/home/chatsiri/workspacecpp/llvm/include -D_DEBUG -D_GNU_SOURCE -D__STDC_CONS...

...ation. We would like to implement branching > on this architecture using predication. > As you know the LLVM-IR doesn't support instruction predication, so I'm > not exactly sure on what is the best way to implement it. > We came up with some ways to do it in LLVM: I recall Ocelot [1], a binary translator which translates PTX into LLVM also faces the same problem. You might want to take a look on what Ocelot does. HTH, chenwj [1] http://www.gdiamos.net/papers/ocelot-pact.pdf -- Wei-Ren Chen (陳韋任) Computer Systems Lab, Institute of Information Science, Academia Sinica, Ta...

http://ppa.launchpad.net/ubuntu-wine/ppa/ubuntu/pool/main/w/wine1.3/ I recently tried to install the Latest .29 WINE from the PPA and it ended up using the .15 version from the official Ubuntu 11.10 Repository instead. Although it doesn't matter for .29 (as it has a bug that has since been fixed), I would like to know if we'll be expecting a package on the PPA for the next version, I

...kernel Signed-off-by: Ido Schimmel <idosch at nvidia.com> --- .../net/ethernet/marvell/prestera/prestera_flower.c | 6 ++++++ drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 6 ++++++ drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c | 6 ++++++ drivers/net/ethernet/mscc/ocelot_flower.c | 10 ++++++++++ 4 files changed, 28 insertions(+) diff --git a/drivers/net/ethernet/marvell/prestera/prestera_flower.c b/drivers/net/ethernet/marvell/prestera/prestera_flower.c index 91a478b75cbf..3e20e71b0f81 100644 --- a/drivers/net/ethernet/marvell/prestera/prestera_flowe...

...:04:05 dev swp0 vlan 1 offload master br0 stale > 00:01:02:03:04:05 dev swp0 offload master br0 stale > 00:01:02:03:04:05 dev swp0 vlan 1 self > 00:01:02:03:04:05 dev swp0 self > > As you can see, the behavior is not identical, and it made more sense > before. I see this is Felix Ocelot and there is no changes in this patchset that affects Felix Ocelot. Thus I am quite sure the results will be the same without this patchset, ergo it must be because of another patch. All that is done here in the DSA layer is to pass on an extra field and add an extra check that will always pass in...

Hi I am interested to know: are there are any LLVM targets in the works for Nvidia's PTX ISA? Also if anyone knows about Ocelot (a project done by some students at my school): it does the opposite of what I am trying to do (translates PTX to LLVM IR to run Cuda kernels on the CPU). Thanks in advance. -Puyan

...0 stale > > 00:01:02:03:04:05 dev swp0 offload master br0 stale > > 00:01:02:03:04:05 dev swp0 vlan 1 self > > 00:01:02:03:04:05 dev swp0 self > > > > As you can see, the behavior is not identical, and it made more sense > > before. > > I see this is Felix Ocelot and there is no changes in this patchset that > affects Felix Ocelot. Thus I am quite sure the results will be the same > without this patchset, ergo it must be because of another patch. All > that is done here in the DSA layer is to pass on an extra field and add > an extra check that...

_Subject: Xen VGA Passthrough to Windows 8 Consumer Preview 64-bit English HVM domU and Windows XP Home Edition SP3 HVM domU with Xen 4.2-unstable Changeset 25070 in Ubuntu 11.10 oneiric ocelot amd64 Final Release Dom0_ Dear All, I have with great success passthrough my Palit NVIDIA Geforce 8400 GS PCI Express x16 graphics card to Windows 8 Consumer Preview HVM domU and Windows XP Home Edition SP3 HVM domU with Xen 4.2-unstable Changeset 25070 in Ubuntu 11.10 oneiric ocelot amd64 Fin...

_Subject: Xen VGA Passthrough to Windows 8 Consumer Preview 64-bit English HVM domU and Windows XP Home Edition SP3 HVM domU with Xen 4.2-unstable Changeset 25070 in Ubuntu 11.10 oneiric ocelot amd64 Final Release Dom0_ Dear All, I have with great success passthrough my Palit NVIDIA Geforce 8400 GS PCI Express x16 graphics card to Windows 8 Consumer Preview HVM domU and Windows XP Home Edition SP3 HVM domU with Xen 4.2-unstable Changeset 25070 in Ubuntu 11.10 oneiric ocelot amd64 Fin...

...ut it does map cleanly to the architecture model. Or perhaps something more generic like gpu_device/gpu_global. [Villmow, Micah] Yeah, but this should apply to more than just gpu's. For example, AMD's OpenCL CPU implementation could utilize the calling conventions, along with projects like ocelot that have the device-only vs host/device differentiation. Maybe just device/host is good enough? Thanks, Micah _______________________________________________ LLVM Developers mailing list LLVMdev at cs.uiuc.edu<mailto:LLVMdev at cs.uiuc.edu> http://llvm.cs.uiuc.edu http://lists.c...

On Mar 26, 2010, at 11:28 PM, Puyan Lotfi wrote: > Hi > > I am interested to know: are there are any LLVM targets in the works > for Nvidia's PTX ISA? > > Also if anyone knows about Ocelot (a project done by some students at > my school): it does the opposite of what I am trying to do (translates > PTX to LLVM IR to run Cuda kernels on the CPU). I don't know of any, but that would be a great project if the nvidia toolchain is sufficiently available for it to be useful to...

...one third of them) in nut-*/docs/man/ On most systems, you don't need to install anything - just extract the tarball, and run 'man' with a relative path to the man page (e.g. 'man ./upsc.8' from the nut-*/docs/man/ directory). Here's the link to the latest tarball: http://ocelot.ghz.cc/~buildbot/nut-2.4.1-r2012.tar.gz The corresponding HTML conversion is here: http://buildbot.ghz.cc/~buildbot/docs/r2012-152/man/index.html Thanks, -- - Charles Lepple

I would like to start by thanking every developer who has contributed to LLVM for releasing such a high quality project. It has been incredibly valuable to several projects that I have worked on. My name is Gregory Diamos, I am a PhD student at Georgia Tech working on Ocelot (http://code.google.com/p/gpuocelot/). Ocelot is a dynamic binary translator from PTX (a virtual instruction set used by NVIDIA GPUs) to multi-core x86. We currently use LLVM's JIT as our x86 code generator. We have a prototype implementation finished that can execute most CUDA applications...

Honestly I don't understand it. First Oneiric Ocelot splits Ubuntu users right down the middle, next thing I know WINE is very unstable after the 1.3.30 update. Here's my problem. I run WINE in Ubuntu Natty Narwhal (11.04). All my apps were running quite happily on version 1.3.28/29 this includes apps: Photoshop CS5 extended Live For Speed Ch...

...architecture model. Or perhaps something more generic > like gpu_device/gpu_global.**** > > *[Villmow, Micah] Yeah, but this should apply to more than just gpu's. > For example, AMD's OpenCL CPU implementation could utilize the calling > conventions, along with projects like ocelot that have the device-only vs > host/device differentiation. Maybe just device/host is good enough?* > Device/host just seems vague. Maybe we could create a set of specific conventions, one set for OpenCL: cl_device/cl_kernel, and another set for general accelerators, e.g. accel_device/accel...

On Sat, Mar 18, 2023 at 03:10:06PM +0100, Hans J. Schultz wrote: > diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c > index e5f156940c67..c07a2e225ae5 100644 > --- a/net/dsa/dsa.c > +++ b/net/dsa/dsa.c > @@ -626,6 +626,12 @@ static int dsa_switch_setup(struct dsa_switch *ds) > > ds->configure_vlan_while_not_filtering = true; > > + /* Since dynamic FDB entries are

Hello, I'm working on a compiler based on LLVM for a SIMD architecture that supports instruction predication. We would like to implement branching on this architecture using predication. As you know the LLVM-IR doesn't support instruction predication, so I'm not exactly sure on what is the best way to implement it. We came up with some ways to do it in LLVM: - Do not add any

Hi, I was wondering if LLVM supports predicates and conditional execution. Something like we have in IA64. There is a register class of predicates and then every instruction may be predicated by a register from this class. For example: cmp_less p, x, y // p is a predicate which gets the result of x < y p add x, x, 2 // if p then do the add instruction Is there support in LLVM to something

...at least four instructions to match the latency of the floating-point functional unit in my Intel Core2 Quad (Q9550 at 2.83 GHz). The microbenchmark itself replicates the following block 512 times: . . { p1 = p1 * a; p2 = p2 * b; p3 = p3 * c; p4 = p4 * d; } . . Compiling with NVCC, Ocelot, and LLVM, I can confirm the interleaved instruction schedule with a four-instruction reuse distance. An excerpt follows: . . %r1500 = fmul float %r1496, %r24 ; compute %1500 %r1501 = fmul float %r1497, %r23 %r1502 = fmul float %r1498, %r22 %r1503 = fmul float %r1499, %r21 %r1504 =...

...ut it does map cleanly to the architecture model. Or perhaps something more generic like gpu_device/gpu_global. [Villmow, Micah] Yeah, but this should apply to more than just gpu's. For example, AMD's OpenCL CPU implementation could utilize the calling conventions, along with projects like ocelot that have the device-only vs host/device differentiation. Maybe just device/host is good enough? Device/host just seems vague. Maybe we could create a set of specific conventions, one set for OpenCL: cl_device/cl_kernel, and another set for general accelerators, e.g. accel_device/accel_global. [V...