Displaying 5 results from an estimated 5 matches for "nvkm_pmu_new_".
2016 Dec 13
0
[PATCH v2 5/15] pmu: add nvkm_pmu_ctor() function
...(+), 6 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/pmu/base.c b/drm/nouveau/nvkm/subdev/pmu/base.c
index 1e645eec1951..6db1ee45e610 100644
--- a/drm/nouveau/nvkm/subdev/pmu/base.c
+++ b/drm/nouveau/nvkm/subdev/pmu/base.c
@@ -128,13 +128,10 @@ nvkm_pmu = {
.intr = nvkm_pmu_intr,
};
-int
-nvkm_pmu_new_(const struct nvkm_pmu_func *func, struct nvkm_device *device,
- int index, struct nvkm_pmu **ppmu)
+void
+nvkm_pmu_ctor(const struct nvkm_pmu_func *func, struct nvkm_device *device,
+ int index, struct nvkm_pmu *pmu)
{
- struct nvkm_pmu *pmu;
- if (!(pmu = *ppmu = kzalloc(sizeof(*pmu),...
2016 Oct 27
0
[PATCH] pmu: remove reset() hook
...e,
.code.size = sizeof(gt215_pmu_code),
.data.data = gt215_pmu_data,
diff --git a/drm/nouveau/nvkm/subdev/pmu/priv.h b/drm/nouveau/nvkm/subdev/pmu/priv.h
index f38c88fae3d6..73b811ccc2d5 100644
--- a/drm/nouveau/nvkm/subdev/pmu/priv.h
+++ b/drm/nouveau/nvkm/subdev/pmu/priv.h
@@ -8,8 +8,6 @@ int nvkm_pmu_new_(const struct nvkm_pmu_func *, struct nvkm_device *,
int index, struct nvkm_pmu **);
struct nvkm_pmu_func {
- void (*reset)(struct nvkm_pmu *);
-
struct {
u32 *data;
u32 size;
--
2.10.0
2016 Dec 13
0
[PATCH v2 4/15] pmu: instanciate the falcon in PMU device
...km_subdev subdev;
+ struct nvkm_falcon falcon;
struct {
u32 base;
diff --git a/drm/nouveau/nvkm/subdev/pmu/base.c b/drm/nouveau/nvkm/subdev/pmu/base.c
index e611ce80f8ef..1e645eec1951 100644
--- a/drm/nouveau/nvkm/subdev/pmu/base.c
+++ b/drm/nouveau/nvkm/subdev/pmu/base.c
@@ -139,5 +139,9 @@ nvkm_pmu_new_(const struct nvkm_pmu_func *func, struct nvkm_device *device,
pmu->func = func;
INIT_WORK(&pmu->recv.work, nvkm_pmu_recv);
init_waitqueue_head(&pmu->recv.wait);
+
+ nvkm_falcon_ctor(&pmu->subdev, &nvkm_falcon_v1_func, "PMU", 0x10a000,
+ &pmu->fa...
2016 Dec 13
15
[PATCH v2 0/15] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some
fixes, I now submit it as its own series to make it easier to review (and also
because rebasing secure boot on top of this takes time and I don't want to do
it until this is validated!).
This series attempts to factorize the duplicate falcon-related code into a
single library, using the existing nvkm_falcon
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
This revision includes initial signed PMU firmware support for GM20B
(Tegra X1). This PMU code will also be used as a basis for dGPU signed
PMU firmware support.
With the PMU code, the refactoring of secure boot should also make
more sense.
ACR (secure boot) support is now separated by the driver version it
originates from. This separation allows to run any version of the ACR
on any chip,