search for: nvkm_pmu_impl

...f (strings[i] == '%') + if (strings[i + 1] == 'x' || strings[i + 1] == 'X') { + *hex_pos = i; + return true; + } + } + *hex_pos = -1; + return false; +} +static int falc_trace_show(struct seq_file *s, void *data) +{ + struct nvkm_pmu *ppmu = s->private; + struct nvkm_pmu_impl *impl = (void *)nv_oclass(ppmu); + struct pmu_desc *pmu = &impl->pmudata; + u32 i = 0, j = 0, k, l, m; + char part_str[40]; + u32 data1; + char *log_data = kmalloc(GK20A_PMU_TRACE_BUFSIZE, GFP_KERNEL); + char *trace = log_data; + u32 *trace1 = (u32 *)log_data; + for (i = 0; i < GK20A_PMU_...

...+ return true; > + } > + } > + *hex_pos = -1; > + return false; > +} > +static int falc_trace_show(struct seq_file *s, void *data) > +{ > + struct nvkm_pmu *ppmu = s->private; > + struct nvkm_pmu_impl *impl = (void *)nv_oclass(ppmu); > + struct pmu_desc *pmu = &impl->pmudata; > + u32 i = 0, j = 0, k, l, m; > + char part_str[40]; > + u32 data1; > + char *log_data = kmalloc(GK20A_PMU_TRACE_BUFSIZE, GFP_KERNEL); > + char *trace = log_data...

...+ return true; > + } > + } > + *hex_pos = -1; > + return false; > +} > +static int falc_trace_show(struct seq_file *s, void *data) > +{ > + struct nvkm_pmu *ppmu = s->private; > + struct nvkm_pmu_impl *impl = (void *)nv_oclass(ppmu); > + struct pmu_desc *pmu = &impl->pmudata; > + u32 i = 0, j = 0, k, l, m; > + char part_str[40]; > + u32 data1; > + char *log_data = kmalloc(GK20A_PMU_TRACE_BUFSIZE, GFP_KERNEL); > + char *trace = log_data...

...it_pmu_setup_sw(priv); + if (ret) + goto err; + + pmu->pgob = nvkm_pmu_pgob; nvkm_alarm_init(&priv->alarm, gk20a_pmu_dvfs_work); + return 0; + +err: + gk20a_pmu_release_firmware(pmu, pmufw); + return ret; } struct nvkm_oclass * @@ -223,8 +988,10 @@ gk20a_pmu_oclass = &(struct nvkm_pmu_impl) { .base.handle = NV_SUBDEV(PMU, 0xea), .base.ofuncs = &(struct nvkm_ofuncs) { .ctor = gk20a_pmu_ctor, - .dtor = _nvkm_pmu_dtor, + .dtor = gk20a_pmu_dtor, .init = gk20a_pmu_init, .fini = gk20a_pmu_fini, }, + .pgob = gk20a_pmu_pgob, }.base; + -- 2.3.5

...+ pmu->initialized = false; + + mutex_lock(&pmu->isr_mutex); + pmu_enable(ppmu, pmc, false); + pmu->isr_enabled = false; + mutex_unlock(&pmu->isr_mutex); + pmu->pmu_state = PMU_STATE_OFF; + pmu->pmu_ready = false; +} + struct nvkm_oclass * gk20a_pmu_oclass = &(struct nvkm_pmu_impl) { .base.handle = NV_SUBDEV(PMU, 0xea), .base.ofuncs = &(struct nvkm_ofuncs) { .ctor = gk20a_pmu_ctor, - .dtor = _nvkm_pmu_dtor, + .dtor = gk20a_pmu_dtor, .init = gk20a_pmu_init, .fini = gk20a_pmu_fini, }, + .pgob = gk20a_pmu_pgob, }.base; -- 1.9.1

...->alarm, gk20a_pmu_dvfs_work); >> + >> return 0; >> + >> +err: >> + gk20a_pmu_release_firmware(pmu, pmufw); >> + return ret; >> } >> >> struct nvkm_oclass * >> @@ -223,8 +988,10 @@ gk20a_pmu_oclass = &(struct nvkm_pmu_impl) { >> .base.handle = NV_SUBDEV(PMU, 0xea), >> .base.ofuncs = &(struct nvkm_ofuncs) { >> .ctor = gk20a_pmu_ctor, >> - .dtor = _nvkm_pmu_dtor, >> + .dtor = gk20a_pmu_dtor, >> .init = gk...